/*
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* arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
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*
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* Marvell Orion-1-90 AP GE Reference Design Setup
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/ethtool.h>
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#include <linux/platform_data/dsa.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include "common.h"
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#include "orion5x.h"
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static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
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.phy_addr = -1,
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.speed = SPEED_1000,
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.duplex = DUPLEX_FULL,
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};
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static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
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.port_names[0] = "lan1",
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.port_names[1] = "lan2",
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.port_names[2] = "lan3",
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.port_names[3] = "lan4",
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.port_names[4] = "wan",
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.port_names[5] = "cpu",
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};
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static struct mtd_partition rd88f6183ap_ge_partitions[] = {
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{
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.name = "kernel",
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.offset = 0x00000000,
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.size = 0x00200000,
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}, {
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.name = "rootfs",
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.offset = 0x00200000,
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.size = 0x00500000,
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}, {
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.name = "nvram",
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.offset = 0x00700000,
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.size = 0x00080000,
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},
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};
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static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
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.type = "m25p64",
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.nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
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.parts = rd88f6183ap_ge_partitions,
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};
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static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
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{
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.modalias = "m25p80",
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.platform_data = &rd88f6183ap_ge_spi_slave_data,
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.max_speed_hz = 20000000,
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.bus_num = 0,
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.chip_select = 0,
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},
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};
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static void __init rd88f6183ap_ge_init(void)
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{
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/*
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* Setup basic Orion functions. Need to be called early.
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*/
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orion5x_init();
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/*
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* Configure peripherals.
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*/
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orion5x_ehci0_init();
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orion5x_eth_init(&rd88f6183ap_ge_eth_data);
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orion5x_eth_switch_init(&rd88f6183ap_ge_switch_chip_data);
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spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
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ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
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orion5x_spi_init();
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orion5x_uart0_init();
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}
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static struct hw_pci rd88f6183ap_ge_pci __initdata = {
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.nr_controllers = 2,
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.setup = orion5x_pci_sys_setup,
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.scan = orion5x_pci_sys_scan_bus,
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.map_irq = orion5x_pci_map_irq,
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};
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static int __init rd88f6183ap_ge_pci_init(void)
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{
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if (machine_is_rd88f6183ap_ge()) {
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orion5x_pci_disable();
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pci_common_init(&rd88f6183ap_ge_pci);
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}
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return 0;
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}
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subsys_initcall(rd88f6183ap_ge_pci_init);
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MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
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/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
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.atag_offset = 0x100,
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.nr_irqs = ORION5X_NR_IRQS,
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.init_machine = rd88f6183ap_ge_init,
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.map_io = orion5x_map_io,
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.init_early = orion5x_init_early,
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.init_irq = orion5x_init_irq,
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.init_time = orion5x_timer_init,
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.fixup = tag_fixup_mem32,
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.restart = orion5x_restart,
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MACHINE_END
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