#ifndef IP1811OP_H
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#define IP1811OP_H
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#define OP_FUNC_DISABLE 0
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#define OP_FUNC_ENABLE 1
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#define OP_SMI_DUPLEX_HALF 0
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#define OP_SMI_DUPLEX_FULL 1
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#define OP_SMI_SPEED_1000 1000
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#define OP_SMI_SPEED_100 100
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#define OP_SMI_SPEED_10 10
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#define OP_CAP_PTCL_BPDU 0
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#define OP_CAP_PTCL_SLOW 1
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#define OP_CAP_PTCL_802_1X 2
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#define OP_CAP_PTCL_LLDP 3
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#define OP_CAP_PTCL_GRP0 4
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#define OP_CAP_PTCL_BRIDGE 5
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#define OP_CAP_PTCL_GRP1 6
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#define OP_CAP_PTCL_GARP 7
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#define OP_CAP_PTCL_GRP2 8
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#define OP_CAP_PTCL_GRP3 9
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#define OP_CAP_ACT_FORWARD 0
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#define OP_CAP_ACT_ALL_PORT 1
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#define OP_CAP_ACT_TO_CPU 2
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#define OP_CAP_ACT_DROP 3
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enum{
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OP_CAT_INBAND_ARP, //0
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OP_CAT_INBAND_IPV4,
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OP_CAT_INBAND_IPV6,
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OP_CAT_INBAND_PPPOE,
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OP_CAT_INBAND_ICMP,
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OP_CAT_INBAND_TCP,
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OP_CAT_INBAND_UDP,
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OP_CAT_INBAND_USER_ETH,
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OP_CAT_INBAND_USER_IP1, //8
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OP_CAT_INBAND_USER_IP2,
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OP_CAT_INBAND_ICMPV6,
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OP_CAT_INBAND_FTP,
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OP_CAT_INBAND_SSH,
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OP_CAT_INBAND_TELNET,
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OP_CAT_INBAND_SMTP,
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OP_CAT_INBAND_DNS,
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OP_CAT_INBAND_BOOTP, //16
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OP_CAT_INBAND_TFTP,
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OP_CAT_INBAND_HTTP,
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OP_CAT_INBAND_POP3,
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OP_CAT_INBAND_NEWS,
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OP_CAT_INBAND_SNTP,
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OP_CAT_INBAND_NETBIOS,
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OP_CAT_INBAND_IMAP,
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OP_CAT_INBAND_SNMP, //24
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OP_CAT_INBAND_HTTPS,
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OP_CAT_INBAND_USER_TCPUDP_A,
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OP_CAT_INBAND_USER_TCPUDP_B,
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OP_CAT_INBAND_USER_TCPUDP_C,
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OP_CAT_INBAND_USER_TCPUDP_D,
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OP_CAT_INBAND_USER_TCPUDP_E,
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OP_CAT_INBAND_TOTALNUM //31
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};
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enum{
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OP_CAT_L3_ICMP, //0
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OP_CAT_L3_TCP,
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OP_CAT_L3_UDP,
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OP_CAT_L3_OSPF,
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OP_CAT_L3_USR1,
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OP_CAT_L3_USR2,
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OP_CAT_L3_IPV4_OTHER,
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OP_CAT_L3_TOTALNUM //7
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};
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enum{
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OP_TCPUDP_PTCL_FTP, //0
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OP_TCPUDP_PTCL_SSH,
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OP_TCPUDP_PTCL_TELNET,
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OP_TCPUDP_PTCL_SMTP,
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OP_TCPUDP_PTCL_DNS,
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OP_TCPUDP_PTCL_DHCP,
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OP_TCPUDP_PTCL_TFTP,
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OP_TCPUDP_PTCL_HTTP,
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OP_TCPUDP_PTCL_POP3,
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OP_TCPUDP_PTCL_NEWS,
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OP_TCPUDP_PTCL_SNTP, //10
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OP_TCPUDP_PTCL_NETBIOS,
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OP_TCPUDP_PTCL_IMAP,
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OP_TCPUDP_PTCL_SNMP,
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OP_TCPUDP_PTCL_HTTPS,
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OP_TCPUDP_PTCL_USR_A,
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OP_TCPUDP_PTCL_USR_B,
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OP_TCPUDP_PTCL_USR_C,
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OP_TCPUDP_PTCL_USR_D,
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OP_TCPUDP_PTCL_USR_E,
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OP_TCPUDP_PTCL_TOTALNUM //10
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};
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enum{
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OP_TCPUDP_USER_A,
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OP_TCPUDP_USER_B,
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OP_TCPUDP_USER_C_LOWER,
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OP_TCPUDP_USER_C_UPPER,
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OP_TCPUDP_USER_D_LOWER,
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OP_TCPUDP_USER_D_UPPER,
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OP_TCPUDP_USER_E_LOWER,
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OP_TCPUDP_USER_E_UPPER,
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OP_TCPUDP_USER_TOTALNUM
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};
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enum{
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OP_TCPUDP_ACT_Q0, //0
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OP_TCPUDP_ACT_Q1,
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OP_TCPUDP_ACT_Q2,
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OP_TCPUDP_ACT_Q3,
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OP_TCPUDP_ACT_Q4,
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OP_TCPUDP_ACT_Q5,
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OP_TCPUDP_ACT_Q6,
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OP_TCPUDP_ACT_Q7,
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OP_TCPUDP_ACT_TO_CPU = 9, //9
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OP_TCPUDP_ACT_DROP,
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OP_TCPUDP_ACT_ALL_PORT
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};
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enum{
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OP_TCPFLAG_FLAG0,
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OP_TCPFLAG_FLAG1,
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OP_TCPFLAG_FLAG2,
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OP_TCPFLAG_FLAG3
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};
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enum{
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OP_TCPFLAG_ACT_NONE,
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OP_TCPFLAG_ACT_STORMCTRL,
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OP_TCPFLAG_ACT_TO_CPU,
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OP_TCPFLAG_ACT_DROP
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};
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enum{
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OP_IPV6_HEADER_FRAG,
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OP_IPV6_HEADER_ENACP,
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OP_IPV6_HEADER_AUTH,
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OP_IPV6_HEADER_ICMPV6,
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OP_IPV6_HEADER_ICMPV6_MLD,
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OP_IPV6_HEADER_ICMPV6_NDP,
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OP_IPV6_HEADER_USER1,
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OP_IPV6_HEADER_USER2,
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OP_IPV6_HEADER_ICMPV6_USER1,
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OP_IPV6_HEADER_ICMPV6_USER2,
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OP_IPV6_HEADER_TOTALNUM
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};
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enum{
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OP_IPV6_HEADER_ICMPV6_USER1_HIGH,
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OP_IPV6_HEADER_ICMPV6_USER1_LOW,
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OP_IPV6_HEADER_ICMPV6_USER2_HIGH,
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OP_IPV6_HEADER_ICMPV6_USER2_LOW
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};
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#define OP_SNIFFER1_METHOD_DISABLE 0
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#define OP_SNIFFER1_METHOD_EGRESS 1
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#define OP_SNIFFER1_METHOD_INGRESS 2
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#define OP_SNIFFER1_METHOD_BOTHDIR 3
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#define OP_SNIFFER1_PKT_MODIFY 0
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#define OP_SNIFFER1_PKT_KEEP 1
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#define OP_SNIFFER1_TAG_KEEP 0
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#define OP_SNIFFER1_TAG_MODIFY 1
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#define OP_SNIFFER2_LUT_TRIGGER_TARGET_DA 0
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#define OP_SNIFFER2_LUT_TRIGGER_TARGET_SA 1
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#define OP_STORM_BCST 0x01
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#define OP_STORM_MCST 0x02
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#define OP_STORM_DLF 0x04
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#define OP_STORM_ARP 0x08
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#define OP_STORM_ICMP 0x10
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#define OP_EOC_STATUS_NORMAL 0
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#define OP_EOC_STATUS_LOOP_DETECTED 1
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#define OP_EOC_RELEASE_TIME_1MIN 1
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#define OP_EOC_RELEASE_TIME_10MIN 10
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#define OP_LD_TIME_UNIT_500MS 0
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#define OP_LD_TIME_UNIT_10S 1
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#define OP_LD_STATUS_NORMAL 0
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#define OP_LD_STATUS_LOOP_DETECTED 1
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#define OP_WOL_MODE_SLAVE 0
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#define OP_WOL_MODE_MASTER 1
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#define OP_WOL_IDLE_UNIT_DISABLE 0
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#define OP_WOL_IDLE_UNIT_10s 1
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#define OP_WOL_IDLE_UNIT_1min 2
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#define OP_WOL_IDLE_UNIT_10min 3
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#define OP_WOL_STATUS_NORMAL 0
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#define OP_WOL_STATUS_SLEEPING 1
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#define OP_WOL_STATUS_RDY4SLEEP 2
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#define OP_WOL_STATUS_SLEEP 3
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#define OP_CPU_PORT_NORMAL 0
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#define OP_CPU_PORT_CPU 1
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#define OP_MAC_SELF_TEST_PKT_NO_32768 32768
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#define OP_MAC_SELF_TEST_PKT_NO_4096 4096
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#define OP_MAC_SELF_TEST_PKT_NO_256 256
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#define OP_MAC_SELF_TEST_PKT_NO_16 16
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#define OP_MAC_SELF_TEST_RESULT_FAIL 0
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#define OP_MAC_SELF_TEST_RESULT_PASS 1
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#define OP_BPDU_CMODE_GLOBAL 0
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#define OP_BPDU_CMODE_BY_PORT 1
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#define OP_STP_STATE_DISCARD 0
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#define OP_STP_STATE_BLOCK 1
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#define OP_STP_STATE_LEARN 2
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#define OP_STP_STATE_FORWARD 3
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#define OP_TRUNK_HASH_METHOD_PORT_ID 0
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#define OP_TRUNK_HASH_METHOD_SA 1
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#define OP_TRUNK_HASH_METHOD_DA 2
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#define OP_TRUNK_HASH_METHOD_DA_SA 3
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#define OP_TRUNK_HASH_METHOD_DIP 4
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#define OP_TRUNK_HASH_METHOD_SIP 5
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#define OP_TRUNK_HASH_METHOD_DP 6
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#define OP_TRUNK_HASH_METHOD_SP 7
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#define OP_TRUNK_COMBINE_G1_G2 5
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#define OP_TRUNK_COMBINE_G3_G4 6
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#define OP_TRUNK_COMBINE_G5_G6 7
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#define OP_LUT_LEARN_MODE_ALL_BY_AGING_TIME 0x0
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#define OP_LUT_LEARN_MODE_NEVER_OVERWRITE 0x1
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#define OP_LUT_LEARN_MODE_L2_BY_AGING_TIME 0x3
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#define OP_HASH_DIRECT 0
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#define OP_HASH_CRC 1
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#define OP_LUT_UNKNOWN_SA_FWD_2_CPU 0x0
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#define OP_LUT_UNKNOWN_SA_DROP 0x1
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#define OP_LUT_UNKNOWN_SA_FWD 0x2
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/* LUT flushing */
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#define OP_LUT_FLUSH_DYNAMIC_ONLY 0x0
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#define OP_LUT_FLUSH_STATIC_ONLY 0x1//not implemented
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#define OP_LUT_FLUSH_ALL 0x2
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/* LUT cfg */
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#define OP_LUT_CFG_FID 0
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#define OP_LUT_CFG_MD 1 //multi-destination, not implemented
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#define OP_LUT_CFG_TRAN 2 //vlan translation
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#define OP_LUT_CFG_MVT 3 //mac-based vlan
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/* LUT action */
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#define OP_ENTRY_CREATE 0
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#define OP_ENTRY_CONFIG 1
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#define OP_ENTRY_DELETE 2
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#define OP_ENTRY_CREATE_REG 3
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#define OP_ENTRY_GET_BY_INDEX 4
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#define OP_ENTRY_GET_BY_INFO 5
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/* the state for getLutValidEntry */
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#ifndef BIT
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#define BIT(x) (1UL << (x))
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#endif
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#define OP_LUT_STATE_DYNAMIC BIT(0)
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#define OP_LUT_STATE_STATIC BIT(1)
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#define OP_LUT_STATE_ALL_STATIC (OP_LUT_STATE_STATIC)
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#define OP_LUT_STATE_ALL (OP_LUT_STATE_DYNAMIC|OP_LUT_STATE_ALL_STATIC)
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enum{
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/* target entry is valid and index values are matched */
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OP_ENTRY_EXISTS=0xE0,
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/* target entry is valid but index values are not matched */
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OP_ENTRY_NOT_MATCH,
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/* target entry is invalid */
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OP_ENTRY_NOT_FOUND,
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/* target dynamice entry is valid and index values are matched */
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OP_ENTRY_EXISTS_DYNAMIC,
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};
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#define OP_IGMP_PACKET_QUERY 0
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#define OP_IGMP_PACKET_LEAVE 4
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#define OP_IGMP_PACKET_UN_REG_DATA 8
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#define OP_IGMP_PACKET_UN_DEFINED 12
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#define OP_IGMP_PACKET_REPORT 1
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#define OP_IGMP_PACKET_GROUP_SPECIFIC_QUERY 6
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#define OP_IGMP_PACKET_REG_DATA 11
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#define OP_IGMP_RULE_BCST 0x01
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#define OP_IGMP_RULE_CPU 0x02
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#define OP_IGMP_RULE_ROUTER 0x04
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#define OP_IGMP_RULE_DROP 0x08
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#define OP_IGMP_RULE_GROUP_MEM 0x10
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#define OP_IGMP_SLT_IPV4 4
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#define OP_IGMP_SLT_IPV6 6
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#define OP_MLD_SEND_TO_PORTS 0
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#define OP_MLD_SEND_TO_PORTS_AND_CPU 1
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#define OP_MLD_SEND_TO_CPU 2
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#define OP_MLD_DROP 3
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#define OP_IMP_DROP_IP_MISMATCH 0
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#define OP_IMP_DROP_IP_MATCH 1
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#define OP_IMP_IPTYPE_4 0
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#define OP_IMP_IPTYPE_6 1
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#define OP_VLAN_EGRESS_UNI_FRAME 0x1
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#define OP_VLAN_EGRESS_ARP_FRAME 0x2
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#define OP_VLAN_EGRESS_MULTI_FRAME 0x4
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#define OP_VLAN_TAGGING_BY_PORT 0x0
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#define OP_VLAN_TAGGING_BY_VID 0x1
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#define OP_VLAN_TYPE_GROUP 0x0
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#define OP_VLAN_TYPE_TAG 0x1
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#define OP_VLAN_PROTOCOL_INVALID 0x0
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#define OP_VLAN_PROTOCOL_ETHER 0x1
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#define OP_VLAN_PROTOCOL_LLC 0x2
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#define OP_VLAN_PROTOCOL_1042 0x3
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enum{
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OP_VLAN_QINQ_STAG_METHOD_ADDR,
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OP_VLAN_QINQ_STAG_METHOD_ACL
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};
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#define OP_QOS_8021PEDTION_2005 0 //2005 edition
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#define OP_QOS_8021PEDTION_2005_EX 1 //2005 + exchange
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#define OP_QOS_8021PEDTION_EARLY 2 //early
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#define OP_QOS_GROUP1 0
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#define OP_QOS_GROUP2 1
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#define OP_CPU_IF_SPEED_HIGH 0
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#define OP_CPU_IF_SPEED_NORMAL 1
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enum{
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OP_QOS_MODE_FIFO,
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OP_QOS_MODE_WWBBT,
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OP_QOS_MODE_SP1_WWBBT7,
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OP_QOS_MODE_SP2_WWBBT6,
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OP_QOS_MODE_SP4_WWBBT4,
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OP_QOS_MODE_SP8
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};
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enum{
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OP_QOS_NUM_Q0,
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OP_QOS_NUM_Q1,
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OP_QOS_NUM_Q2,
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OP_QOS_NUM_Q3,
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OP_QOS_NUM_Q4,
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OP_QOS_NUM_Q5,
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OP_QOS_NUM_Q6,
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OP_QOS_NUM_Q7
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};
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enum{
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OP_QOS_UNIT_64KBS,
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OP_QOS_UNIT_1MBS,
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OP_QOS_UNIT_2MBS,
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OP_QOS_UNIT_4MBS
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};
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enum{
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OP_QOS_REMAP_RX_Q0,
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OP_QOS_REMAP_RX_Q1,
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OP_QOS_REMAP_RX_Q2,
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OP_QOS_REMAP_RX_Q3,
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OP_QOS_REMAP_RX_Q4,
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OP_QOS_REMAP_RX_Q5,
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OP_QOS_REMAP_RX_Q6,
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OP_QOS_REMAP_RX_Q7,
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OP_QOS_REMAP_TX_Q0,
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OP_QOS_REMAP_TX_Q1,
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OP_QOS_REMAP_TX_Q2,
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OP_QOS_REMAP_TX_Q3,
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OP_QOS_REMAP_TX_Q4,
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OP_QOS_REMAP_TX_Q5,
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OP_QOS_REMAP_TX_Q6,
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OP_QOS_REMAP_TX_Q7
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};
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#define OP_QOS_REMPA_RX 0
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#define OP_QOS_REMPA_TX 1
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enum{
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OP_QOS_METHOD_WRR,
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OP_QOS_METHOD_BW,
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OP_QOS_METHOD_WFQ,
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OP_QOS_METHOD_TWRR
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};
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#define OP_QOS_QBASE_DBM 0
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#define OP_QOS_QBASE_SBM 1
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enum{
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OP_BW_PERIOD_4KB_500MS,
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OP_BW_PERIOD_2KB_250MS,
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OP_BW_PERIOD_1KB_125MS,
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OP_BW_PERIOD_512B_63MS,
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OP_BW_PERIOD_256B_31MS,
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OP_BW_PERIOD_128B_16MS,
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OP_BW_PERIOD_64B_8MS,
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OP_BW_PERIOD_32B_4MS
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};
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#define OP_EEPROM_LEN_24C16 2048
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#define OP_EEPROM_LEN_24C32 4096
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enum Eeprom_Type {
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OP_EE_TYPE_C16,
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OP_EE_TYPE_C32,
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OP_EE_TYPE_Unknow
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};
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#define OP_HSR_MANDATORY 0
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#define OP_HSR_UNICAST 1
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#endif /* IP1811OP_H */
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