/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _FG_RK8XX_H_
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#define _FG_RK8XX_H_
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/* register definition */
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#define SECONDS_REG 0X00
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#define VB_MON_REG 0x21
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#define THERMAL_REG 0x22
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#define SUP_STS_REG 0xA0
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#define USB_CTRL_REG 0xA1
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#define CHRG_CTRL_REG1 0xA3
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#define CHRG_CTRL_REG2 0xA4
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#define CHRG_CTRL_REG3 0xA5
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#define BAT_CTRL_REG 0xA6
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#define BAT_HTS_TS_REG 0xA8
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#define BAT_LTS_TS_REG 0xA9
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#define TS_CTRL_REG 0xAC
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#define ADC_CTRL_REG 0xAD
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#define GGCON_REG 0xB0
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#define GGSTS_REG 0xB1
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#define ZERO_CUR_ADC_REGH 0xB2
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#define ZERO_CUR_ADC_REGL 0xB3
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#define GASCNT_CAL_REG3 0xB4
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#define GASCNT_CAL_REG2 0xB5
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#define GASCNT_CAL_REG1 0xB6
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#define GASCNT_CAL_REG0 0xB7
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#define GASCNT_REG3 0xB8
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#define GASCNT_REG2 0xB9
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#define GASCNT_REG1 0xBA
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#define GASCNT_REG0 0xBB
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#define BAT_CUR_AVG_REGH 0xBC
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#define BAT_CUR_AVG_REGL 0xBD
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#define TS_ADC_REGH 0xBE
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#define TS_ADC_REGL 0xBF
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#define RK818_TS2_ADC_REGH 0xC0
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#define RK818_TS2_ADC_REGL 0xC1
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#define RK816_USB_ADC_REGH 0xC0
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#define RK816_USB_ADC_REGL 0xC1
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#define BAT_OCV_REGH 0xC2
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#define BAT_OCV_REGL 0xC3
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#define BAT_VOL_REGH 0xC4
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#define BAT_VOL_REGL 0xC5
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#define RELAX_ENTRY_THRES_REGH 0xC6
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#define RELAX_ENTRY_THRES_REGL 0xC7
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#define RELAX_EXIT_THRES_REGH 0xC8
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#define RELAX_EXIT_THRES_REGL 0xC9
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#define RELAX_VOL1_REGH 0xCA
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#define RELAX_VOL1_REGL 0xCB
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#define RELAX_VOL2_REGH 0xCC
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#define RELAX_VOL2_REGL 0xCD
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#define RELAX_CUR1_REGH 0xCE
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#define RELAX_CUR1_REGL 0xCF
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#define RELAX_CUR2_REGH 0xD0
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#define RELAX_CUR2_REGL 0xD1
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#define CAL_OFFSET_REGH 0xD2
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#define CAL_OFFSET_REGL 0xD3
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#define NON_ACT_TIMER_CNT_REG 0xD4
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#define VCALIB0_REGH 0xD5
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#define VCALIB0_REGL 0xD6
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#define VCALIB1_REGH 0xD7
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#define VCALIB1_REGL 0xD8
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#define FCC_GASCNT_REG3 0xD9
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#define FCC_GASCNT_REG2 0xDA
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#define FCC_GASCNT_REG1 0xDB
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#define FCC_GASCNT_REG0 0xDC
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#define IOFFSET_REGH 0xDD
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#define IOFFSET_REGL 0xDE
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#define SLEEP_CON_SAMP_CUR_REG 0xDF
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#define SOC_REG 0xE0
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#define REMAIN_CAP_REG3 0xE1
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#define REMAIN_CAP_REG2 0xE2
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#define REMAIN_CAP_REG1 0xE3
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#define REMAIN_CAP_REG0 0xE4
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#define UPDAT_LEVE_REG 0xE5
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#define NEW_FCC_REG3 0xE6
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#define NEW_FCC_REG2 0xE7
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#define NEW_FCC_REG1 0xE8
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#define NEW_FCC_REG0 0xE9
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#define NON_ACT_TIMER_CNT_SAVE_REG 0xEA
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#define OCV_VOL_VALID_REG 0xEB
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#define REBOOT_CNT_REG 0xEC
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#define POFFSET_REG 0xED
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#define MISC_MARK_REG 0xEE
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#define HALT_CNT_REG 0xEF
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#define DATA15_REG 0xEF
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#define DATA16_REG 0xF0
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#define DATA17_REG 0xF1
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#define DATA18_REG 0xF2
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#endif
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