/*
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* (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/gpio.h>
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#include <dm.h>
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#include <dm/device.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <i2c.h>
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#include <linux/usb/phy-rockchip-usb2.h>
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#include <malloc.h>
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#include <power/battery.h>
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#include <power/fuel_gauge.h>
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#include <power/pmic.h>
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#include "fg_regs.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define COMPAT_ROCKCHIP_CW201X "cw201x"
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#define REG_VERSION 0x0
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#define REG_VCELL 0x2
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#define REG_SOC 0x4
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#define REG_RRT_ALERT 0x6
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#define REG_CONFIG 0x8
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#define REG_MODE 0xA
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#define REG_BATINFO 0x10
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#define MODE_SLEEP_MASK (0x3 << 6)
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#define MODE_SLEEP (0x3 << 6)
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#define MODE_NORMAL (0x0 << 6)
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#define MODE_QUICK_START (0x3 << 4)
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#define MODE_RESTART (0xf << 0)
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#define CONFIG_UPDATE_FLG (0x1 << 1)
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#define ATHD (0x0 << 3)
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enum charger_type {
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CHARGER_TYPE_NO = 0,
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CHARGER_TYPE_USB,
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CHARGER_TYPE_AC,
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CHARGER_TYPE_DC,
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CHARGER_TYPE_UNDEF,
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};
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struct cw201x_info {
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struct udevice *dev;
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int capacity;
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u32 *cw_bat_config_info;
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int divider_res1;
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int divider_res2;
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int hw_id_check;
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struct gpio_desc hw_id0;
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struct gpio_desc hw_id1;
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int support_dc_adp;
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struct gpio_desc dc_det_gpio;
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int dc_det_flag;
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bool dual_cell;
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};
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static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
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{
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u8 val;
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int ret;
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ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
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if (ret) {
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debug("write error to device: %p register: %#x!",
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cw201x->dev, reg);
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return ret;
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}
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return val;
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}
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static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
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{
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int ret;
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ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
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if (ret) {
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debug("write error to device: %p register: %#x!",
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cw201x->dev, reg);
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return ret;
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}
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return 0;
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}
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static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
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{
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u8 vall, valh;
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u16 val;
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valh = cw201x_read(cw201x, reg);
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vall = cw201x_read(cw201x, reg + 1);
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val = ((u16)valh << 8) | vall;
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return val;
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}
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static int cw201x_parse_config_info(struct cw201x_info *cw201x)
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{
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int ret;
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int i, len, size;
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const u8 *info;
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struct udevice *dev = cw201x->dev;
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if (dev_read_prop(dev, "bat_config_info", &len)) {
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len /= sizeof(u32);
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size = sizeof(*cw201x->cw_bat_config_info) * len;
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cw201x->cw_bat_config_info = calloc(size, 1);
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if (!cw201x->cw_bat_config_info) {
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debug("calloc cw_bat_config_info fail\n");
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return -EINVAL;
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}
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ret = dev_read_u32_array(dev, "bat_config_info",
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cw201x->cw_bat_config_info, len);
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if (ret) {
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debug("fdtdec_get cw_bat_config_info fail\n");
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return -EINVAL;
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}
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return 0;
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}
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if (!dev_read_prop(dev, "cellwise,battery-profile", &len))
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return -EINVAL;
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size = sizeof(*cw201x->cw_bat_config_info) * len;
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cw201x->cw_bat_config_info = calloc(size, 1);
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if (!cw201x->cw_bat_config_info) {
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debug("calloc cw_bat_config_info fail\n");
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return -EINVAL;
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}
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info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
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if (!info) {
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debug("fdtdec_get battery profile fail\n");
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return -EINVAL;
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}
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for (i = 0; i < len; i++) {
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cw201x->cw_bat_config_info[i] = info[i];
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debug("%#x ", cw201x->cw_bat_config_info[i]);
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if ((i+1) % 8 == 0)
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debug("\n");
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}
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return 0;
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}
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static int cw201x_ofdata_to_platdata(struct udevice *dev)
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{
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struct cw201x_info *cw201x = dev_get_priv(dev);
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int ret;
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int hw_id0_val, hw_id1_val;
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cw201x->dev = dev;
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ret = cw201x_parse_config_info(cw201x);
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if (ret)
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return ret;
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cw201x->dual_cell = dev_read_bool(dev, "cellwise,dual-cell");
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ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
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0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
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if (!ret) {
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cw201x->support_dc_adp = 1;
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debug("DC is valid\n");
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} else {
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debug("DC is invalid, ret=%d\n", ret);
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}
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cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0);
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if (cw201x->hw_id_check) {
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ret = gpio_request_by_name_nodev(dev_ofnode(dev),
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"hw_id0_gpio", 0,
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&cw201x->hw_id0, GPIOD_IS_IN);
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if (ret)
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return -EINVAL;
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hw_id0_val = dm_gpio_get_value(&cw201x->hw_id0);
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ret = gpio_request_by_name_nodev(dev_ofnode(dev),
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"hw_id1_gpio", 0,
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&cw201x->hw_id1, GPIOD_IS_IN);
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if (ret)
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return -EINVAL;
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hw_id1_val = dm_gpio_get_value(&cw201x->hw_id1);
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/* ID1 = 0, ID0 = 1 : Battery */
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if (!hw_id0_val || hw_id1_val)
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return -EINVAL;
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}
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cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0);
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cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0);
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return 0;
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}
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static int cw201x_get_vol(struct cw201x_info *cw201x)
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{
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u16 value16, value16_1, value16_2, value16_3;
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int voltage;
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int res1, res2;
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int retry = 0;
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__retry:
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value16 = cw201x_read_half_word(cw201x, REG_VCELL);
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if (value16 < 0)
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return -1;
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value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
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if (value16_1 < 0)
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return -1;
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value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
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if (value16_2 < 0)
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return -1;
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if (value16 > value16_1) {
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value16_3 = value16;
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value16 = value16_1;
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value16_1 = value16_3;
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}
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if (value16_1 > value16_2) {
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value16_3 = value16_1;
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value16_1 = value16_2;
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value16_2 = value16_3;
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}
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if (value16 > value16_1) {
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value16_3 = value16;
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value16 = value16_1;
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value16_1 = value16_3;
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}
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voltage = value16_1 * 312 / 1024;
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if (voltage <= 0 && retry < 10) {
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retry++;
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mdelay(20);
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goto __retry;
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}
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if (cw201x->divider_res1 &&
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cw201x->divider_res2) {
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res1 = cw201x->divider_res1;
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res2 = cw201x->divider_res2;
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voltage = voltage * (res1 + res2) / res2;
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}
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if (cw201x->dual_cell)
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voltage *= 2;
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debug("the cw201x voltage=%d\n", voltage);
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return voltage;
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}
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static int cw201x_dwc_otg_check_dpdm(void)
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{
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#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
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return rockchip_chg_get_type();
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#else
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debug("rockchip_chg_get_type() is not implement\n");
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return CHARGER_TYPE_NO;
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#endif
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}
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static int cw201x_get_usb_state(struct cw201x_info *cw201x)
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{
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int charger_type;
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switch (cw201x_dwc_otg_check_dpdm()) {
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case 0:
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charger_type = CHARGER_TYPE_NO;
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break;
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case 1:
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case 3:
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charger_type = CHARGER_TYPE_USB;
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break;
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case 2:
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charger_type = CHARGER_TYPE_AC;
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break;
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default:
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charger_type = CHARGER_TYPE_NO;
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break;
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}
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return charger_type;
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}
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static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
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{
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if (dm_gpio_get_value(&cw201x->dc_det_gpio))
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return true;
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return false;
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}
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static bool cw201x_check_charge(struct cw201x_info *cw201x)
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{
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if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
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return true;
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if (cw201x_get_dc_state(cw201x))
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return true;
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return false;
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}
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static int cw201x_get_soc(struct cw201x_info *cw201x)
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{
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int cap, i = 0;
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while (i < 10) {
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cap = cw201x_read(cw201x, REG_SOC);
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if ((cap < 0) || (cap > 100))
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cap = cw201x->capacity;
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i++;
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if (cap)
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break;
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}
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cw201x->capacity = cap;
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return cw201x->capacity;
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}
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static int cw201x_update_get_soc(struct udevice *dev)
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{
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struct cw201x_info *cw201x = dev_get_priv(dev);
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return cw201x_get_soc(cw201x);
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}
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static int cw201x_update_get_voltage(struct udevice *dev)
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{
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struct cw201x_info *cw201x = dev_get_priv(dev);
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return cw201x_get_vol(cw201x);
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}
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static int cw201x_update_get_current(struct udevice *dev)
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{
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return 0;
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}
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static bool cw201x_update_get_chrg_online(struct udevice *dev)
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{
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struct cw201x_info *cw201x = dev_get_priv(dev);
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return cw201x_check_charge(cw201x);
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}
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static int cw201x_capability(struct udevice *dev)
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{
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return FG_CAP_FUEL_GAUGE;
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}
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static struct dm_fuel_gauge_ops cw201x_fg_ops = {
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.capability = cw201x_capability,
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.get_soc = cw201x_update_get_soc,
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.get_voltage = cw201x_update_get_voltage,
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.get_current = cw201x_update_get_current,
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.get_chrg_online = cw201x_update_get_chrg_online,
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};
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static int cw201x_fg_cfg(struct cw201x_info *cw201x)
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{
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u8 val = MODE_SLEEP;
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int i;
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if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
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val = MODE_NORMAL;
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cw201x_write(cw201x, REG_MODE, val);
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}
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for (i = 0; i < 64; i++) {
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cw201x_write(cw201x, REG_BATINFO + i,
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(u8)cw201x->cw_bat_config_info[i]);
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}
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return 0;
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}
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static int cw201x_fg_probe(struct udevice *dev)
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{
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struct cw201x_info *cw201x = dev_get_priv(dev);
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cw201x->dev = dev;
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cw201x_fg_cfg(cw201x);
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debug("vol: %d, soc: %d\n",
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cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
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return 0;
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}
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static const struct udevice_id cw201x_ids[] = {
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{ .compatible = "cw201x" },
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{ .compatible = "cellwise,cw2015" },
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{ }
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};
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U_BOOT_DRIVER(cw201x_fg) = {
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.name = "cw201x_fg",
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.id = UCLASS_FG,
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.of_match = cw201x_ids,
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.probe = cw201x_fg_probe,
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.ofdata_to_platdata = cw201x_ofdata_to_platdata,
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.ops = &cw201x_fg_ops,
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.priv_auto_alloc_size = sizeof(struct cw201x_info),
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};
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