/*
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* Copyright 2007-2011 Freescale Semiconductor, Inc.
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* Authors: York Sun <yorksun@freescale.com>
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* Timur Tabi <timur@freescale.com>
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*
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* FSL DIU Framebuffer driver
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include <fsl_diu_fb.h>
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#include "../common/pixis.h"
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#define PX_BRDCFG0_DLINK 0x10
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#define PX_BRDCFG0_DVISEL 0x08
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void diu_set_pixel_clock(unsigned int pixclock)
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{
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
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unsigned long speed_ccb, temp, pixval;
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speed_ccb = get_bus_freq(0);
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temp = 1000000000/pixclock;
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temp *= 1000;
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pixval = speed_ccb / temp;
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debug("DIU pixval = %lu\n", pixval);
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/* Modify PXCLK in GUTS CLKDVDR */
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debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
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temp = *guts_clkdvdr & 0x2000FFFF;
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*guts_clkdvdr = temp; /* turn off clock */
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*guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
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debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
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}
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int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
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{
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const char *name;
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int gamma_fix = 0;
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u32 pixel_format = 0x88883316;
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u8 temp;
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temp = in_8(&pixis->brdcfg0);
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if (strncmp(port, "dlvds", 5) == 0) {
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/* Dual link LVDS */
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gamma_fix = 1;
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temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
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name = "Dual-Link LVDS";
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} else if (strncmp(port, "lvds", 4) == 0) {
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/* Single link LVDS */
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temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
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name = "Single-Link LVDS";
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} else {
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/* DVI */
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if (in_8(&pixis->ver) == 1) /* Board version */
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pixel_format = 0x88882317;
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temp |= PX_BRDCFG0_DVISEL;
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name = "DVI";
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}
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printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
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out_8(&pixis->brdcfg0, temp);
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return fsl_diu_init(xres, yres, pixel_format, gamma_fix);
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}
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