/*************************************************************************/ /*!
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@File
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@Title System Configuration
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description System Configuration functions
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#include "sysinfo.h"
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#include "apollo_regs.h"
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#include "pvrsrv_device.h"
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#include "rgxdevice.h"
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#include "syscommon.h"
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#include "allocmem.h"
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#include "pvr_debug.h"
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#if defined(SUPPORT_ION)
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#include PVR_ANDROID_ION_HEADER
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#include "ion_support.h"
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#include "ion_sys.h"
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#endif
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#include "apollo_drv.h"
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#include <linux/platform_device.h>
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#if !defined(LMA)
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#error Apollo only supports LMA at the minute
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#endif
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/* Valid values for the TC_MEMORY_CONFIG configuration option */
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#define TC_MEMORY_LOCAL (1)
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#define TC_MEMORY_HOST (2)
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#define TC_MEMORY_HYBRID (3)
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#if TC_MEMORY_CONFIG != TC_MEMORY_LOCAL
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#error Apollo only supports TC_MEMORY_LOCAL at the minute
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#endif
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/* These must be consecutive */
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#define PHYS_HEAP_IDX_GENERAL 0
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#define PHYS_HEAP_IDX_DMABUF 1
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#define PHYS_HEAP_IDX_COUNT 2
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#define SYS_RGX_ACTIVE_POWER_LATENCY_MS (10)
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#if defined(PVR_DVFS) || defined(SUPPORT_PDVFS)
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/* Dummy DVFS configuration used purely for testing purposes */
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static const IMG_OPP asOPPTable[] =
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{
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{ 8, 25000000},
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{ 16, 50000000},
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{ 32, 75000000},
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{ 64, 100000000},
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};
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#define LEVEL_COUNT (sizeof(asOPPTable) / sizeof(IMG_OPP))
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static void SetFrequency(IMG_UINT32 ui32Frequency)
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{
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PVR_DPF((PVR_DBG_ERROR, "SetFrequency %u", ui32Frequency));
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}
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static void SetVoltage(IMG_UINT32 ui32Voltage)
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{
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PVR_DPF((PVR_DBG_ERROR, "SetVoltage %u", ui32Voltage));
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}
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#endif
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static void TCLocalCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_DEV_PHYADDR *psDevPAddr,
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IMG_CPU_PHYADDR *psCpuPAddr);
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static void TCLocalDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_CPU_PHYADDR *psCpuPAddr,
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IMG_DEV_PHYADDR *psDevPAddr);
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static IMG_UINT32 TCLocalGetRegionId(IMG_HANDLE hPrivData,
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PVRSRV_MEMALLOCFLAGS_T uiAllocFlags);
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static PHYS_HEAP_FUNCTIONS gsLocalPhysHeapFuncs =
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{
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.pfnCpuPAddrToDevPAddr = TCLocalCpuPAddrToDevPAddr,
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.pfnDevPAddrToCpuPAddr = TCLocalDevPAddrToCpuPAddr,
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.pfnGetRegionId = TCLocalGetRegionId,
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};
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static void TCIonCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_DEV_PHYADDR *psDevPAddr,
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IMG_CPU_PHYADDR *psCpuPAddr);
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static void TCIonDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_CPU_PHYADDR *psCpuPAddr,
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IMG_DEV_PHYADDR *psDevPAddr);
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static IMG_UINT32 TCIonGetRegionId(IMG_HANDLE hPrivData,
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PVRSRV_MEMALLOCFLAGS_T uiAllocFlags);
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static PHYS_HEAP_FUNCTIONS gsIonPhysHeapFuncs =
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{
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.pfnCpuPAddrToDevPAddr = TCIonCpuPAddrToDevPAddr,
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.pfnDevPAddrToCpuPAddr = TCIonDevPAddrToCpuPAddr,
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.pfnGetRegionId = TCIonGetRegionId,
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};
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/* BIF Tiling mode configuration */
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static RGXFWIF_BIFTILINGMODE geBIFTilingMode = RGXFWIF_BIFTILINGMODE_256x16;
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/* Default BIF tiling heap x-stride configurations. */
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static IMG_UINT32 gauiBIFTilingHeapXStrides[RGXFWIF_NUM_BIF_TILING_CONFIGS] =
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{
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0, /* BIF tiling heap 1 x-stride */
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1, /* BIF tiling heap 2 x-stride */
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2, /* BIF tiling heap 3 x-stride */
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3 /* BIF tiling heap 4 x-stride */
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};
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typedef struct _SYS_DATA_ SYS_DATA;
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struct _SYS_DATA_
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{
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struct platform_device *pdev;
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struct apollo_rogue_platform_data *pdata;
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struct resource *registers;
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#if defined(SUPPORT_ION)
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struct ion_client *ion_client;
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struct ion_handle *ion_rogue_allocation;
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#endif
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};
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#define SYSTEM_INFO_FORMAT_STRING "FPGA Revision: %s\tTCF Core Revision: %s\tTCF Core Target Build ID: %s\tPCI Version: %s\tMacro Version: %s"
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static IMG_CHAR *GetDeviceVersionString(SYS_DATA *psSysData)
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{
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int err;
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char str_fpga_rev[12];
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char str_tcf_core_rev[12];
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char str_tcf_core_target_build_id[4];
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char str_pci_ver[4];
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char str_macro_ver[8];
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IMG_CHAR *pszVersion;
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IMG_UINT32 ui32StringLength;
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err = apollo_sys_strings(psSysData->pdev->dev.parent,
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str_fpga_rev, sizeof(str_fpga_rev),
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str_tcf_core_rev, sizeof(str_tcf_core_rev),
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str_tcf_core_target_build_id, sizeof(str_tcf_core_target_build_id),
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str_pci_ver, sizeof(str_pci_ver),
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str_macro_ver, sizeof(str_macro_ver));
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if (err)
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{
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return NULL;
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}
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ui32StringLength = OSStringLength(SYSTEM_INFO_FORMAT_STRING);
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ui32StringLength += OSStringLength(str_fpga_rev);
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ui32StringLength += OSStringLength(str_tcf_core_rev);
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ui32StringLength += OSStringLength(str_tcf_core_target_build_id);
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ui32StringLength += OSStringLength(str_pci_ver);
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ui32StringLength += OSStringLength(str_macro_ver);
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/* Create the version string */
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pszVersion = OSAllocZMem(ui32StringLength * sizeof(IMG_CHAR));
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if (pszVersion)
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{
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OSSNPrintf(&pszVersion[0], ui32StringLength,
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SYSTEM_INFO_FORMAT_STRING,
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str_fpga_rev,
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str_tcf_core_rev,
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str_tcf_core_target_build_id,
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str_pci_ver,
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str_macro_ver);
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}
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return pszVersion;
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}
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#if defined(SUPPORT_ION)
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static SYS_DATA *gpsIonPrivateData;
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PVRSRV_ERROR IonInit(void *pvPrivateData)
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{
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PVRSRV_ERROR eError = PVRSRV_OK;
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SYS_DATA *psSysData = pvPrivateData;
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gpsIonPrivateData = psSysData;
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psSysData->ion_client = ion_client_create(psSysData->pdata->ion_device, SYS_RGX_DEV_NAME);
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if (IS_ERR(psSysData->ion_client))
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{
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PVR_DPF((PVR_DBG_ERROR, "%s: Failed to create ION client (%ld)", __func__, PTR_ERR(psSysData->ion_client)));
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/* FIXME: Find a better matching error code */
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eError = PVRSRV_ERROR_PCI_CALL_FAILED;
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goto err_out;
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}
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/* Allocate the whole rogue ion heap and pass that to services to manage */
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psSysData->ion_rogue_allocation = ion_alloc(psSysData->ion_client, psSysData->pdata->rogue_heap_memory_size, 4096, (1 << psSysData->pdata->ion_heap_id), 0);
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if (IS_ERR(psSysData->ion_rogue_allocation))
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{
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PVR_DPF((PVR_DBG_ERROR, "%s: Failed to allocate ION rogue buffer (%ld)", __func__, PTR_ERR(psSysData->ion_rogue_allocation)));
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/* FIXME: Find a better matching error code */
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eError = PVRSRV_ERROR_PCI_CALL_FAILED;
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goto err_destroy_client;
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}
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return PVRSRV_OK;
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err_destroy_client:
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ion_client_destroy(psSysData->ion_client);
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psSysData->ion_client = NULL;
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err_out:
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return eError;
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}
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void IonDeinit(void)
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{
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SYS_DATA *psSysData = gpsIonPrivateData;
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ion_free(psSysData->ion_client, psSysData->ion_rogue_allocation);
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psSysData->ion_rogue_allocation = NULL;
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ion_client_destroy(psSysData->ion_client);
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psSysData->ion_client = NULL;
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}
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struct ion_device *IonDevAcquire(void)
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{
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return gpsIonPrivateData->pdata->ion_device;
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}
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void IonDevRelease(struct ion_device *ion_device)
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{
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PVR_ASSERT(ion_device == gpsIonPrivateData->pdata->ion_device);
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}
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#endif /* defined(SUPPORT_ION) */
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static void TCLocalCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_DEV_PHYADDR *psDevPAddr,
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IMG_CPU_PHYADDR *psCpuPAddr)
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{
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PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
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/* Optimise common case */
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psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr - psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
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if (ui32NumOfAddr > 1)
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{
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IMG_UINT32 ui32Idx;
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for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
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{
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psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr - psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
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}
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}
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}
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static void TCLocalDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_CPU_PHYADDR *psCpuPAddr,
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IMG_DEV_PHYADDR *psDevPAddr)
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{
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PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
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/* Optimise common case */
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psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr + psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
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if (ui32NumOfAddr > 1)
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{
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IMG_UINT32 ui32Idx;
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for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
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{
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psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr + psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
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}
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}
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}
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static IMG_UINT32 TCLocalGetRegionId(IMG_HANDLE hPrivData,
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PVRSRV_MEMALLOCFLAGS_T uiAllocFlags)
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{
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/* Return first region which is always valid */
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return 0;
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}
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static void TCIonCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_DEV_PHYADDR *psDevPAddr,
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IMG_CPU_PHYADDR *psCpuPAddr)
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{
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PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
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SYS_DATA *psSysData = psDevConfig->hSysData;
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/* Optimise common case */
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psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr - psSysData->pdata->apollo_memory_base;
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if (ui32NumOfAddr > 1)
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{
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IMG_UINT32 ui32Idx;
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for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
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{
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psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr - psSysData->pdata->apollo_memory_base;
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}
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}
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}
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static void TCIonDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
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IMG_UINT32 ui32NumOfAddr,
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IMG_CPU_PHYADDR *psCpuPAddr,
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IMG_DEV_PHYADDR *psDevPAddr)
|
{
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PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
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SYS_DATA *psSysData = psDevConfig->hSysData;
|
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/* Optimise common case */
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psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr + psSysData->pdata->apollo_memory_base;
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if (ui32NumOfAddr > 1)
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{
|
IMG_UINT32 ui32Idx;
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for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
|
{
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psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr + psSysData->pdata->apollo_memory_base;
|
}
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}
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}
|
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static IMG_UINT32 TCIonGetRegionId(IMG_HANDLE hPrivData,
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PVRSRV_MEMALLOCFLAGS_T uiAllocFlags)
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{
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/* Return first region which is always valid */
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return 0;
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}
|
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static PVRSRV_ERROR PhysHeapsCreate(SYS_DATA *psSysData,
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void *pvPrivData,
|
PHYS_HEAP_CONFIG **ppasPhysHeapsOut,
|
IMG_UINT32 *puiPhysHeapCountOut)
|
{
|
static IMG_UINT32 uiHeapIDBase = 0;
|
PHYS_HEAP_CONFIG *pasPhysHeaps;
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PHYS_HEAP_REGION *psRegion;
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PVRSRV_ERROR eError;
|
|
pasPhysHeaps = OSAllocMem(sizeof(*pasPhysHeaps) * PHYS_HEAP_IDX_COUNT);
|
if (!pasPhysHeaps)
|
{
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return PVRSRV_ERROR_OUT_OF_MEMORY;
|
}
|
|
psRegion = OSAllocMem(sizeof(*psRegion));
|
if (!psRegion)
|
{
|
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
|
goto ErrorFreePhysHeaps;
|
}
|
|
psRegion->sStartAddr.uiAddr = psSysData->pdata->rogue_heap_memory_base;
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psRegion->sCardBase.uiAddr = 0;
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psRegion->uiSize = psSysData->pdata->rogue_heap_memory_size;
|
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID =
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uiHeapIDBase + PHYS_HEAP_IDX_GENERAL;
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].eType = PHYS_HEAP_TYPE_LMA;
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pszPDumpMemspaceName = "LMA";
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pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].psMemFuncs = &gsLocalPhysHeapFuncs;
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pasRegions = psRegion;
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pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32NumOfRegions = 1;
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pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].hPrivData = pvPrivData;
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|
psRegion = OSAllocMem(sizeof(*psRegion));
|
if (!psRegion)
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{
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eError = PVRSRV_ERROR_OUT_OF_MEMORY;
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goto ErrorGeneralPhysHeapDestroy;
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}
|
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psRegion->sStartAddr.uiAddr = psSysData->pdata->pdp_heap_memory_base;
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psRegion->sCardBase.uiAddr = 0;
|
psRegion->uiSize = psSysData->pdata->pdp_heap_memory_size;
|
|
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].ui32PhysHeapID =
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uiHeapIDBase + PHYS_HEAP_IDX_DMABUF;
|
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].eType = PHYS_HEAP_TYPE_LMA;
|
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].pszPDumpMemspaceName = "LMA";
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pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].psMemFuncs = &gsIonPhysHeapFuncs;
|
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].pasRegions = psRegion;
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pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].ui32NumOfRegions = 1;
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pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].hPrivData = pvPrivData;
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|
uiHeapIDBase += PHYS_HEAP_IDX_COUNT;
|
|
*ppasPhysHeapsOut = pasPhysHeaps;
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*puiPhysHeapCountOut = PHYS_HEAP_IDX_COUNT;
|
|
return PVRSRV_OK;
|
|
ErrorGeneralPhysHeapDestroy:
|
OSFreeMem(pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pasRegions);
|
|
ErrorFreePhysHeaps:
|
OSFreeMem(pasPhysHeaps);
|
return eError;
|
}
|
|
static void PhysHeapsDestroy(PHYS_HEAP_CONFIG *pasPhysHeaps,
|
IMG_UINT32 uiPhysHeapCount)
|
{
|
IMG_UINT32 i;
|
|
for (i = 0; i < uiPhysHeapCount; i++)
|
{
|
if (pasPhysHeaps[i].pasRegions)
|
{
|
OSFreeMem(pasPhysHeaps[i].pasRegions);
|
}
|
}
|
|
OSFreeMem(pasPhysHeaps);
|
}
|
|
static PVRSRV_ERROR DeviceConfigCreate(SYS_DATA *psSysData,
|
PVRSRV_DEVICE_CONFIG **ppsDevConfigOut)
|
{
|
PVRSRV_DEVICE_CONFIG *psDevConfig;
|
RGX_DATA *psRGXData;
|
RGX_TIMING_INFORMATION *psRGXTimingInfo;
|
PHYS_HEAP_CONFIG *pasPhysHeaps;
|
IMG_UINT32 uiPhysHeapCount;
|
PVRSRV_ERROR eError;
|
|
psDevConfig = OSAllocZMem(sizeof(*psDevConfig) +
|
sizeof(*psRGXData) +
|
sizeof(*psRGXTimingInfo));
|
if (!psDevConfig)
|
{
|
return PVRSRV_ERROR_OUT_OF_MEMORY;
|
}
|
|
psRGXData = (RGX_DATA *)((IMG_CHAR *)psDevConfig + sizeof(*psDevConfig));
|
psRGXTimingInfo = (RGX_TIMING_INFORMATION *)((IMG_CHAR *)psRGXData + sizeof(*psRGXData));
|
|
eError = PhysHeapsCreate(psSysData, psDevConfig, &pasPhysHeaps, &uiPhysHeapCount);
|
if (eError != PVRSRV_OK)
|
{
|
goto ErrorFreeDevConfig;
|
}
|
|
/* Setup RGX specific timing data */
|
psRGXTimingInfo->ui32CoreClockSpeed = apollo_core_clock_speed(&psSysData->pdev->dev) * 6;
|
psRGXTimingInfo->bEnableActivePM = IMG_FALSE;
|
psRGXTimingInfo->bEnableRDPowIsland = IMG_FALSE;
|
psRGXTimingInfo->ui32ActivePMLatencyms = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
|
|
/* Set up the RGX data */
|
psRGXData->psRGXTimingInfo = psRGXTimingInfo;
|
|
/* Setup the device config */
|
psDevConfig->pvOSDevice = &psSysData->pdev->dev;
|
psDevConfig->pszName = "apollo";
|
psDevConfig->pszVersion = GetDeviceVersionString(psSysData);
|
|
psDevConfig->sRegsCpuPBase.uiAddr = psSysData->registers->start;
|
psDevConfig->ui32RegsSize = resource_size(psSysData->registers);
|
|
psDevConfig->ui32IRQ = APOLLO_INTERRUPT_EXT;
|
|
psDevConfig->eCacheSnoopingMode = PVRSRV_DEVICE_SNOOP_NONE;
|
|
psDevConfig->pasPhysHeaps = pasPhysHeaps;
|
psDevConfig->ui32PhysHeapCount = uiPhysHeapCount;
|
|
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] =
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
|
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] =
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
|
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_FW_LOCAL] =
|
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
|
|
psDevConfig->eBIFTilingMode = geBIFTilingMode;
|
psDevConfig->pui32BIFTilingHeapConfigs = &gauiBIFTilingHeapXStrides[0];
|
psDevConfig->ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);
|
|
psDevConfig->hDevData = psRGXData;
|
psDevConfig->hSysData = psSysData;
|
|
#if defined(PVR_DVFS) || defined(SUPPORT_PDVFS)
|
/* Dummy DVFS configuration used purely for testing purposes */
|
psDevConfig->sDVFS.sDVFSDeviceCfg.pasOPPTable = asOPPTable;
|
psDevConfig->sDVFS.sDVFSDeviceCfg.ui32OPPTableSize = LEVEL_COUNT;
|
psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetFrequency = SetFrequency;
|
psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetVoltage = SetVoltage;
|
#endif
|
#if defined(PVR_DVFS)
|
psDevConfig->sDVFS.sDVFSDeviceCfg.ui32PollMs = 1000;
|
psDevConfig->sDVFS.sDVFSDeviceCfg.bIdleReq = IMG_TRUE;
|
psDevConfig->sDVFS.sDVFSGovernorCfg.ui32UpThreshold = 90;
|
psDevConfig->sDVFS.sDVFSGovernorCfg.ui32DownDifferential = 10;
|
#endif
|
|
*ppsDevConfigOut = psDevConfig;
|
|
return PVRSRV_OK;
|
|
ErrorFreeDevConfig:
|
OSFreeMem(psDevConfig);
|
return eError;
|
}
|
|
static void DeviceConfigDestroy(PVRSRV_DEVICE_CONFIG *psDevConfig)
|
{
|
if (psDevConfig->pszVersion)
|
{
|
OSFreeMem(psDevConfig->pszVersion);
|
}
|
|
PhysHeapsDestroy(psDevConfig->pasPhysHeaps, psDevConfig->ui32PhysHeapCount);
|
|
OSFreeMem(psDevConfig);
|
}
|
|
PVRSRV_ERROR SysDevInit(void *pvOSDevice, PVRSRV_DEVICE_CONFIG **ppsDevConfig)
|
{
|
PVRSRV_DEVICE_CONFIG *psDevConfig;
|
SYS_DATA *psSysData;
|
resource_size_t uiRegistersSize;
|
PVRSRV_ERROR eError;
|
int err = 0;
|
|
PVR_ASSERT(pvOSDevice);
|
|
psSysData = OSAllocZMem(sizeof(*psSysData));
|
if (psSysData == NULL)
|
{
|
return PVRSRV_ERROR_OUT_OF_MEMORY;
|
}
|
|
psSysData->pdev = to_platform_device((struct device *)pvOSDevice);
|
psSysData->pdata = psSysData->pdev->dev.platform_data;
|
|
err = apollo_enable(psSysData->pdev->dev.parent);
|
if (err)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to enable PCI device (%d)", __func__, err));
|
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
|
goto ErrFreeSysData;
|
}
|
|
psSysData->registers = platform_get_resource_byname(psSysData->pdev,
|
IORESOURCE_MEM,
|
"rogue-regs");
|
if (!psSysData->registers)
|
{
|
PVR_DPF((PVR_DBG_ERROR,
|
"%s: Failed to get Rogue register information",
|
__func__));
|
eError = PVRSRV_ERROR_PCI_REGION_UNAVAILABLE;
|
goto ErrorDevDisable;
|
}
|
|
/* Check the address range is large enough. */
|
uiRegistersSize = resource_size(psSysData->registers);
|
if (uiRegistersSize < SYS_RGX_REG_REGION_SIZE)
|
{
|
PVR_DPF((PVR_DBG_ERROR,
|
"%s: Rogue register region isn't big enough (was %pa, required 0x%08x)",
|
__FUNCTION__, &uiRegistersSize, SYS_RGX_REG_REGION_SIZE));
|
|
eError = PVRSRV_ERROR_PCI_REGION_TOO_SMALL;
|
goto ErrorDevDisable;
|
}
|
|
/* Reserve the address range */
|
if (!request_mem_region(psSysData->registers->start,
|
resource_size(psSysData->registers),
|
SYS_RGX_DEV_NAME))
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: Rogue register memory region not available", __FUNCTION__));
|
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
|
|
goto ErrorDevDisable;
|
}
|
|
eError = DeviceConfigCreate(psSysData, &psDevConfig);
|
if (eError != PVRSRV_OK)
|
{
|
goto ErrorReleaseMemRegion;
|
}
|
|
#if defined(SUPPORT_ION)
|
eError = IonInit(psSysData);
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to initialise ION", __func__));
|
goto ErrorDeviceConfigDestroy;
|
}
|
#endif
|
|
*ppsDevConfig = psDevConfig;
|
|
return PVRSRV_OK;
|
|
#if defined(SUPPORT_ION)
|
ErrorDeviceConfigDestroy:
|
DeviceConfigDestroy(psDevConfig);
|
#endif
|
ErrorReleaseMemRegion:
|
release_mem_region(psSysData->registers->start,
|
resource_size(psSysData->registers));
|
ErrorDevDisable:
|
apollo_disable(psSysData->pdev->dev.parent);
|
ErrFreeSysData:
|
OSFreeMem(psSysData);
|
return eError;
|
}
|
|
void SysDevDeInit(PVRSRV_DEVICE_CONFIG *psDevConfig)
|
{
|
SYS_DATA *psSysData = (SYS_DATA *)psDevConfig->hSysData;
|
|
#if defined(SUPPORT_ION)
|
IonDeinit();
|
#endif
|
|
DeviceConfigDestroy(psDevConfig);
|
|
release_mem_region(psSysData->registers->start,
|
resource_size(psSysData->registers));
|
apollo_disable(psSysData->pdev->dev.parent);
|
|
OSFreeMem(psSysData);
|
}
|
|
PVRSRV_ERROR SysDebugInfo(PVRSRV_DEVICE_CONFIG *psDevConfig,
|
DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
|
void *pvDumpDebugFile)
|
{
|
#if defined(TC_APOLLO_TCF5)
|
PVR_UNREFERENCED_PARAMETER(psDevConfig);
|
PVR_UNREFERENCED_PARAMETER(pfnDumpDebugPrintf);
|
return PVRSRV_OK;
|
#else
|
SYS_DATA *psSysData = psDevConfig->hSysData;
|
PVRSRV_ERROR eError = PVRSRV_OK;
|
u32 tmp = 0;
|
u32 pll;
|
|
PVR_DUMPDEBUG_LOG("------[ rgx_tc system debug ]------");
|
|
if (apollo_sys_info(psSysData->pdev->dev.parent, &tmp, &pll))
|
goto err_out;
|
|
if (tmp > 0)
|
PVR_DUMPDEBUG_LOG("Chip temperature: %d degrees C", tmp);
|
PVR_DUMPDEBUG_LOG("PLL status: %x", pll);
|
|
err_out:
|
return eError;
|
#endif
|
}
|
|
typedef struct
|
{
|
struct device *psDev;
|
int iInterruptID;
|
void *pvData;
|
SYS_PFN_LISR pfnLISR;
|
} LISR_DATA;
|
|
static void ApolloInterruptHandler(void* pvData)
|
{
|
LISR_DATA *psLISRData = pvData;
|
psLISRData->pfnLISR(psLISRData->pvData);
|
}
|
|
PVRSRV_ERROR SysInstallDeviceLISR(IMG_HANDLE hSysData,
|
IMG_UINT32 ui32IRQ,
|
const IMG_CHAR *pszName,
|
SYS_PFN_LISR pfnLISR,
|
void *pvData,
|
IMG_HANDLE *phLISRData)
|
{
|
SYS_DATA *psSysData = (SYS_DATA *)hSysData;
|
LISR_DATA *psLISRData;
|
PVRSRV_ERROR eError;
|
int err;
|
|
if (ui32IRQ != APOLLO_INTERRUPT_EXT)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: No device matching IRQ %d", __func__, ui32IRQ));
|
return PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
|
}
|
|
psLISRData = OSAllocZMem(sizeof(*psLISRData));
|
if (!psLISRData)
|
{
|
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
|
goto err_out;
|
}
|
|
psLISRData->pfnLISR = pfnLISR;
|
psLISRData->pvData = pvData;
|
psLISRData->iInterruptID = ui32IRQ;
|
psLISRData->psDev = psSysData->pdev->dev.parent;
|
|
err = apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, ApolloInterruptHandler, psLISRData);
|
if (err)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_set_interrupt_handler() failed (%d)", __func__, err));
|
eError = PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
|
goto err_free_data;
|
}
|
|
err = apollo_enable_interrupt(psLISRData->psDev, psLISRData->iInterruptID);
|
if (err)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_enable_interrupt() failed (%d)", __func__, err));
|
eError = PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
|
goto err_unset_interrupt_handler;
|
}
|
|
*phLISRData = psLISRData;
|
eError = PVRSRV_OK;
|
|
PVR_TRACE(("Installed device LISR %pf to irq %u", pfnLISR, ui32IRQ));
|
|
err_out:
|
return eError;
|
err_unset_interrupt_handler:
|
apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, NULL, NULL);
|
err_free_data:
|
OSFreeMem(psLISRData);
|
goto err_out;
|
}
|
|
PVRSRV_ERROR SysUninstallDeviceLISR(IMG_HANDLE hLISRData)
|
{
|
LISR_DATA *psLISRData = (LISR_DATA *) hLISRData;
|
int err;
|
|
err = apollo_disable_interrupt(psLISRData->psDev, psLISRData->iInterruptID);
|
if (err)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_enable_interrupt() failed (%d)", __func__, err));
|
}
|
|
err = apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, NULL, NULL);
|
if (err)
|
{
|
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_set_interrupt_handler() failed (%d)", __func__, err));
|
}
|
|
PVR_TRACE(("Uninstalled device LISR %pf from irq %u", psLISRData->pfnLISR, psLISRData->iInterruptID));
|
|
OSFreeMem(psLISRData);
|
|
return PVRSRV_OK;
|
}
|
