// SPDX-License-Identifier: GPL-2.0
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/*
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* ii_pci20kc.c
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* Driver for Intelligent Instruments PCI-20001C carrier board and modules.
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*
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* Copyright (C) 2000 Markus Kempf <kempf@matsci.uni-sb.de>
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* with suggestions from David Schleef 16.06.2000
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*/
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/*
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* Driver: ii_pci20kc
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* Description: Intelligent Instruments PCI-20001C carrier board
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* Devices: [Intelligent Instrumentation] PCI-20001C (ii_pci20kc)
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* Author: Markus Kempf <kempf@matsci.uni-sb.de>
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* Status: works
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*
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* Supports the PCI-20001C-1a and PCI-20001C-2a carrier boards. The
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* -2a version has 32 on-board DIO channels. Three add-on modules
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* can be added to the carrier board for additional functionality.
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*
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* Supported add-on modules:
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* PCI-20006M-1 1 channel, 16-bit analog output module
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* PCI-20006M-2 2 channel, 16-bit analog output module
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* PCI-20341M-1A 4 channel, 16-bit analog input module
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*
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* Options:
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* 0 Board base address
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* 1 IRQ (not-used)
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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#include "../comedidev.h"
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/*
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* Register I/O map
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*/
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#define II20K_SIZE 0x400
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#define II20K_MOD_OFFSET 0x100
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#define II20K_ID_REG 0x00
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#define II20K_ID_MOD1_EMPTY BIT(7)
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#define II20K_ID_MOD2_EMPTY BIT(6)
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#define II20K_ID_MOD3_EMPTY BIT(5)
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#define II20K_ID_MASK 0x1f
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#define II20K_ID_PCI20001C_1A 0x1b /* no on-board DIO */
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#define II20K_ID_PCI20001C_2A 0x1d /* on-board DIO */
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#define II20K_MOD_STATUS_REG 0x40
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#define II20K_MOD_STATUS_IRQ_MOD1 BIT(7)
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#define II20K_MOD_STATUS_IRQ_MOD2 BIT(6)
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#define II20K_MOD_STATUS_IRQ_MOD3 BIT(5)
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#define II20K_DIO0_REG 0x80
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#define II20K_DIO1_REG 0x81
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#define II20K_DIR_ENA_REG 0x82
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#define II20K_DIR_DIO3_OUT BIT(7)
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#define II20K_DIR_DIO2_OUT BIT(6)
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#define II20K_BUF_DISAB_DIO3 BIT(5)
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#define II20K_BUF_DISAB_DIO2 BIT(4)
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#define II20K_DIR_DIO1_OUT BIT(3)
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#define II20K_DIR_DIO0_OUT BIT(2)
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#define II20K_BUF_DISAB_DIO1 BIT(1)
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#define II20K_BUF_DISAB_DIO0 BIT(0)
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#define II20K_CTRL01_REG 0x83
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#define II20K_CTRL01_SET BIT(7)
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#define II20K_CTRL01_DIO0_IN BIT(4)
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#define II20K_CTRL01_DIO1_IN BIT(1)
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#define II20K_DIO2_REG 0xc0
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#define II20K_DIO3_REG 0xc1
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#define II20K_CTRL23_REG 0xc3
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#define II20K_CTRL23_SET BIT(7)
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#define II20K_CTRL23_DIO2_IN BIT(4)
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#define II20K_CTRL23_DIO3_IN BIT(1)
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#define II20K_ID_PCI20006M_1 0xe2 /* 1 AO channels */
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#define II20K_ID_PCI20006M_2 0xe3 /* 2 AO channels */
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#define II20K_AO_STRB_REG(x) (0x0b + ((x) * 0x08))
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#define II20K_AO_LSB_REG(x) (0x0d + ((x) * 0x08))
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#define II20K_AO_MSB_REG(x) (0x0e + ((x) * 0x08))
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#define II20K_AO_STRB_BOTH_REG 0x1b
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#define II20K_ID_PCI20341M_1 0x77 /* 4 AI channels */
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#define II20K_AI_STATUS_CMD_REG 0x01
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#define II20K_AI_STATUS_CMD_BUSY BIT(7)
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#define II20K_AI_STATUS_CMD_HW_ENA BIT(1)
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#define II20K_AI_STATUS_CMD_EXT_START BIT(0)
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#define II20K_AI_LSB_REG 0x02
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#define II20K_AI_MSB_REG 0x03
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#define II20K_AI_PACER_RESET_REG 0x04
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#define II20K_AI_16BIT_DATA_REG 0x06
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#define II20K_AI_CONF_REG 0x10
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#define II20K_AI_CONF_ENA BIT(2)
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#define II20K_AI_OPT_REG 0x11
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#define II20K_AI_OPT_TRIG_ENA BIT(5)
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#define II20K_AI_OPT_TRIG_INV BIT(4)
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#define II20K_AI_OPT_TIMEBASE(x) (((x) & 0x3) << 1)
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#define II20K_AI_OPT_BURST_MODE BIT(0)
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#define II20K_AI_STATUS_REG 0x12
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#define II20K_AI_STATUS_INT BIT(7)
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#define II20K_AI_STATUS_TRIG BIT(6)
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#define II20K_AI_STATUS_TRIG_ENA BIT(5)
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#define II20K_AI_STATUS_PACER_ERR BIT(2)
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#define II20K_AI_STATUS_DATA_ERR BIT(1)
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#define II20K_AI_STATUS_SET_TIME_ERR BIT(0)
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#define II20K_AI_LAST_CHAN_ADDR_REG 0x13
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#define II20K_AI_CUR_ADDR_REG 0x14
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#define II20K_AI_SET_TIME_REG 0x15
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#define II20K_AI_DELAY_LSB_REG 0x16
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#define II20K_AI_DELAY_MSB_REG 0x17
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#define II20K_AI_CHAN_ADV_REG 0x18
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#define II20K_AI_CHAN_RESET_REG 0x19
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#define II20K_AI_START_TRIG_REG 0x1a
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#define II20K_AI_COUNT_RESET_REG 0x1b
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#define II20K_AI_CHANLIST_REG 0x80
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#define II20K_AI_CHANLIST_ONBOARD_ONLY BIT(5)
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#define II20K_AI_CHANLIST_GAIN(x) (((x) & 0x3) << 3)
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#define II20K_AI_CHANLIST_MUX_ENA BIT(2)
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#define II20K_AI_CHANLIST_CHAN(x) (((x) & 0x3) << 0)
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#define II20K_AI_CHANLIST_LEN 0x80
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/* the AO range is set by jumpers on the 20006M module */
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static const struct comedi_lrange ii20k_ao_ranges = {
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3, {
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BIP_RANGE(5), /* Chan 0 - W1/W3 in Chan 1 - W2/W4 in */
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UNI_RANGE(10), /* Chan 0 - W1/W3 out Chan 1 - W2/W4 in */
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BIP_RANGE(10) /* Chan 0 - W1/W3 in Chan 1 - W2/W4 out */
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}
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};
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static const struct comedi_lrange ii20k_ai_ranges = {
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4, {
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BIP_RANGE(5), /* gain 1 */
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BIP_RANGE(0.5), /* gain 10 */
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BIP_RANGE(0.05), /* gain 100 */
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BIP_RANGE(0.025) /* gain 200 */
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},
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};
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static void __iomem *ii20k_module_iobase(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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return dev->mmio + (s->index + 1) * II20K_MOD_OFFSET;
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}
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static int ii20k_ao_insn_write(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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void __iomem *iobase = ii20k_module_iobase(dev, s);
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unsigned int chan = CR_CHAN(insn->chanspec);
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int i;
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for (i = 0; i < insn->n; i++) {
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unsigned int val = data[i];
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s->readback[chan] = val;
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/* munge the offset binary data to 2's complement */
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val = comedi_offset_munge(s, val);
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writeb(val & 0xff, iobase + II20K_AO_LSB_REG(chan));
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writeb((val >> 8) & 0xff, iobase + II20K_AO_MSB_REG(chan));
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writeb(0x00, iobase + II20K_AO_STRB_REG(chan));
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}
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return insn->n;
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}
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static int ii20k_ai_eoc(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned long context)
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{
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void __iomem *iobase = ii20k_module_iobase(dev, s);
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unsigned char status;
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status = readb(iobase + II20K_AI_STATUS_REG);
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if ((status & II20K_AI_STATUS_INT) == 0)
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return 0;
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return -EBUSY;
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}
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static void ii20k_ai_setup(struct comedi_device *dev,
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struct comedi_subdevice *s,
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unsigned int chanspec)
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{
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void __iomem *iobase = ii20k_module_iobase(dev, s);
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unsigned int chan = CR_CHAN(chanspec);
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unsigned int range = CR_RANGE(chanspec);
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unsigned char val;
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/* initialize module */
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writeb(II20K_AI_CONF_ENA, iobase + II20K_AI_CONF_REG);
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/* software conversion */
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writeb(0, iobase + II20K_AI_STATUS_CMD_REG);
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/* set the time base for the settling time counter based on the gain */
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val = (range < 3) ? II20K_AI_OPT_TIMEBASE(0) : II20K_AI_OPT_TIMEBASE(2);
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writeb(val, iobase + II20K_AI_OPT_REG);
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/* set the settling time counter based on the gain */
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val = (range < 2) ? 0x58 : (range < 3) ? 0x93 : 0x99;
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writeb(val, iobase + II20K_AI_SET_TIME_REG);
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/* set number of input channels */
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writeb(1, iobase + II20K_AI_LAST_CHAN_ADDR_REG);
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/* set the channel list byte */
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val = II20K_AI_CHANLIST_ONBOARD_ONLY |
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II20K_AI_CHANLIST_MUX_ENA |
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II20K_AI_CHANLIST_GAIN(range) |
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II20K_AI_CHANLIST_CHAN(chan);
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writeb(val, iobase + II20K_AI_CHANLIST_REG);
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/* reset settling time counter and trigger delay counter */
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writeb(0, iobase + II20K_AI_COUNT_RESET_REG);
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/* reset channel scanner */
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writeb(0, iobase + II20K_AI_CHAN_RESET_REG);
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}
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static int ii20k_ai_insn_read(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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void __iomem *iobase = ii20k_module_iobase(dev, s);
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int ret;
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int i;
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ii20k_ai_setup(dev, s, insn->chanspec);
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for (i = 0; i < insn->n; i++) {
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unsigned int val;
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/* generate a software start convert signal */
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readb(iobase + II20K_AI_PACER_RESET_REG);
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ret = comedi_timeout(dev, s, insn, ii20k_ai_eoc, 0);
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if (ret)
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return ret;
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val = readb(iobase + II20K_AI_LSB_REG);
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val |= (readb(iobase + II20K_AI_MSB_REG) << 8);
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/* munge the 2's complement data to offset binary */
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data[i] = comedi_offset_munge(s, val);
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}
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return insn->n;
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}
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static void ii20k_dio_config(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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unsigned char ctrl01 = 0;
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unsigned char ctrl23 = 0;
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unsigned char dir_ena = 0;
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/* port 0 - channels 0-7 */
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if (s->io_bits & 0x000000ff) {
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/* output port */
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ctrl01 &= ~II20K_CTRL01_DIO0_IN;
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dir_ena &= ~II20K_BUF_DISAB_DIO0;
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dir_ena |= II20K_DIR_DIO0_OUT;
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} else {
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/* input port */
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ctrl01 |= II20K_CTRL01_DIO0_IN;
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dir_ena &= ~II20K_DIR_DIO0_OUT;
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}
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/* port 1 - channels 8-15 */
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if (s->io_bits & 0x0000ff00) {
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/* output port */
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ctrl01 &= ~II20K_CTRL01_DIO1_IN;
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dir_ena &= ~II20K_BUF_DISAB_DIO1;
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dir_ena |= II20K_DIR_DIO1_OUT;
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} else {
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/* input port */
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ctrl01 |= II20K_CTRL01_DIO1_IN;
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dir_ena &= ~II20K_DIR_DIO1_OUT;
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}
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/* port 2 - channels 16-23 */
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if (s->io_bits & 0x00ff0000) {
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/* output port */
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ctrl23 &= ~II20K_CTRL23_DIO2_IN;
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dir_ena &= ~II20K_BUF_DISAB_DIO2;
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dir_ena |= II20K_DIR_DIO2_OUT;
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} else {
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/* input port */
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ctrl23 |= II20K_CTRL23_DIO2_IN;
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dir_ena &= ~II20K_DIR_DIO2_OUT;
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}
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/* port 3 - channels 24-31 */
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if (s->io_bits & 0xff000000) {
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/* output port */
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ctrl23 &= ~II20K_CTRL23_DIO3_IN;
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dir_ena &= ~II20K_BUF_DISAB_DIO3;
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dir_ena |= II20K_DIR_DIO3_OUT;
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} else {
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/* input port */
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ctrl23 |= II20K_CTRL23_DIO3_IN;
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dir_ena &= ~II20K_DIR_DIO3_OUT;
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}
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ctrl23 |= II20K_CTRL01_SET;
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ctrl23 |= II20K_CTRL23_SET;
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/* order is important */
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writeb(ctrl01, dev->mmio + II20K_CTRL01_REG);
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writeb(ctrl23, dev->mmio + II20K_CTRL23_REG);
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writeb(dir_ena, dev->mmio + II20K_DIR_ENA_REG);
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}
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static int ii20k_dio_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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unsigned int chan = CR_CHAN(insn->chanspec);
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unsigned int mask;
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int ret;
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if (chan < 8)
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mask = 0x000000ff;
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else if (chan < 16)
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mask = 0x0000ff00;
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else if (chan < 24)
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mask = 0x00ff0000;
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else
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mask = 0xff000000;
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ret = comedi_dio_insn_config(dev, s, insn, data, mask);
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if (ret)
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return ret;
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ii20k_dio_config(dev, s);
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return insn->n;
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}
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static int ii20k_dio_insn_bits(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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unsigned int mask;
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mask = comedi_dio_update_state(s, data);
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if (mask) {
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if (mask & 0x000000ff)
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writeb((s->state >> 0) & 0xff,
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dev->mmio + II20K_DIO0_REG);
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if (mask & 0x0000ff00)
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writeb((s->state >> 8) & 0xff,
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dev->mmio + II20K_DIO1_REG);
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if (mask & 0x00ff0000)
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writeb((s->state >> 16) & 0xff,
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dev->mmio + II20K_DIO2_REG);
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if (mask & 0xff000000)
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writeb((s->state >> 24) & 0xff,
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dev->mmio + II20K_DIO3_REG);
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}
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data[1] = readb(dev->mmio + II20K_DIO0_REG);
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data[1] |= readb(dev->mmio + II20K_DIO1_REG) << 8;
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data[1] |= readb(dev->mmio + II20K_DIO2_REG) << 16;
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data[1] |= readb(dev->mmio + II20K_DIO3_REG) << 24;
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return insn->n;
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}
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static int ii20k_init_module(struct comedi_device *dev,
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struct comedi_subdevice *s)
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{
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void __iomem *iobase = ii20k_module_iobase(dev, s);
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unsigned char id;
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int ret;
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id = readb(iobase + II20K_ID_REG);
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switch (id) {
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case II20K_ID_PCI20006M_1:
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case II20K_ID_PCI20006M_2:
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/* Analog Output subdevice */
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s->type = COMEDI_SUBD_AO;
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s->subdev_flags = SDF_WRITABLE;
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s->n_chan = (id == II20K_ID_PCI20006M_2) ? 2 : 1;
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s->maxdata = 0xffff;
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s->range_table = &ii20k_ao_ranges;
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s->insn_write = ii20k_ao_insn_write;
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ret = comedi_alloc_subdev_readback(s);
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if (ret)
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return ret;
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break;
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case II20K_ID_PCI20341M_1:
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/* Analog Input subdevice */
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s->type = COMEDI_SUBD_AI;
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s->subdev_flags = SDF_READABLE | SDF_DIFF;
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s->n_chan = 4;
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s->maxdata = 0xffff;
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s->range_table = &ii20k_ai_ranges;
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s->insn_read = ii20k_ai_insn_read;
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break;
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default:
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s->type = COMEDI_SUBD_UNUSED;
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break;
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}
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return 0;
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}
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static int ii20k_attach(struct comedi_device *dev,
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struct comedi_devconfig *it)
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{
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struct comedi_subdevice *s;
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unsigned int membase;
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unsigned char id;
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bool has_dio;
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int ret;
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membase = it->options[0];
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if (!membase || (membase & ~(0x100000 - II20K_SIZE))) {
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dev_warn(dev->class_dev,
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"%s: invalid memory address specified\n",
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dev->board_name);
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return -EINVAL;
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}
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if (!request_mem_region(membase, II20K_SIZE, dev->board_name)) {
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dev_warn(dev->class_dev, "%s: I/O mem conflict (%#x,%u)\n",
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dev->board_name, membase, II20K_SIZE);
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return -EIO;
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}
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dev->iobase = membase; /* actually, a memory address */
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dev->mmio = ioremap(membase, II20K_SIZE);
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if (!dev->mmio)
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return -ENOMEM;
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id = readb(dev->mmio + II20K_ID_REG);
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switch (id & II20K_ID_MASK) {
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case II20K_ID_PCI20001C_1A:
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has_dio = false;
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break;
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case II20K_ID_PCI20001C_2A:
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has_dio = true;
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break;
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default:
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return -ENODEV;
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}
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ret = comedi_alloc_subdevices(dev, 4);
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if (ret)
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return ret;
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s = &dev->subdevices[0];
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if (id & II20K_ID_MOD1_EMPTY) {
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s->type = COMEDI_SUBD_UNUSED;
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} else {
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ret = ii20k_init_module(dev, s);
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if (ret)
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return ret;
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}
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s = &dev->subdevices[1];
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if (id & II20K_ID_MOD2_EMPTY) {
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s->type = COMEDI_SUBD_UNUSED;
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} else {
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ret = ii20k_init_module(dev, s);
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if (ret)
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return ret;
|
}
|
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s = &dev->subdevices[2];
|
if (id & II20K_ID_MOD3_EMPTY) {
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s->type = COMEDI_SUBD_UNUSED;
|
} else {
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ret = ii20k_init_module(dev, s);
|
if (ret)
|
return ret;
|
}
|
|
/* Digital I/O subdevice */
|
s = &dev->subdevices[3];
|
if (has_dio) {
|
s->type = COMEDI_SUBD_DIO;
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s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
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s->n_chan = 32;
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s->maxdata = 1;
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s->range_table = &range_digital;
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s->insn_bits = ii20k_dio_insn_bits;
|
s->insn_config = ii20k_dio_insn_config;
|
|
/* default all channels to input */
|
ii20k_dio_config(dev, s);
|
} else {
|
s->type = COMEDI_SUBD_UNUSED;
|
}
|
|
return 0;
|
}
|
|
static void ii20k_detach(struct comedi_device *dev)
|
{
|
if (dev->mmio)
|
iounmap(dev->mmio);
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if (dev->iobase) /* actually, a memory address */
|
release_mem_region(dev->iobase, II20K_SIZE);
|
}
|
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static struct comedi_driver ii20k_driver = {
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.driver_name = "ii_pci20kc",
|
.module = THIS_MODULE,
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.attach = ii20k_attach,
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.detach = ii20k_detach,
|
};
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module_comedi_driver(ii20k_driver);
|
|
MODULE_AUTHOR("Comedi http://www.comedi.org");
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MODULE_DESCRIPTION("Comedi driver for Intelligent Instruments PCI-20001C");
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MODULE_LICENSE("GPL");
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