// SPDX-License-Identifier: GPL-2.0+
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/*
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* dt282x.c
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* Comedi driver for Data Translation DT2821 series
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
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*/
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/*
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* Driver: dt282x
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* Description: Data Translation DT2821 series (including DT-EZ)
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* Author: ds
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* Devices: [Data Translation] DT2821 (dt2821), DT2821-F-16SE (dt2821-f),
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* DT2821-F-8DI (dt2821-f), DT2821-G-16SE (dt2821-g),
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* DT2821-G-8DI (dt2821-g), DT2823 (dt2823), DT2824-PGH (dt2824-pgh),
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* DT2824-PGL (dt2824-pgl), DT2825 (dt2825), DT2827 (dt2827),
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* DT2828 (dt2828), DT2928 (dt2829), DT21-EZ (dt21-ez), DT23-EZ (dt23-ez),
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* DT24-EZ (dt24-ez), DT24-EZ-PGL (dt24-ez-pgl)
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* Status: complete
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* Updated: Wed, 22 Aug 2001 17:11:34 -0700
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*
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* Configuration options:
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* [0] - I/O port base address
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* [1] - IRQ (optional, required for async command support)
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* [2] - DMA 1 (optional, required for async command support)
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* [3] - DMA 2 (optional, required for async command support)
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* [4] - AI jumpered for 0=single ended, 1=differential
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* [5] - AI jumpered for 0=straight binary, 1=2's complement
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* [6] - AO 0 data format (deprecated, see below)
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* [7] - AO 1 data format (deprecated, see below)
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* [8] - AI jumpered for 0=[-10,10]V, 1=[0,10], 2=[-5,5], 3=[0,5]
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* [9] - AO channel 0 range (deprecated, see below)
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* [10]- AO channel 1 range (deprecated, see below)
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*
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* Notes:
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* - AO commands might be broken.
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* - If you try to run a command on both the AI and AO subdevices
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* simultaneously, bad things will happen. The driver needs to
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* be fixed to check for this situation and return an error.
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* - AO range is not programmable. The AO subdevice has a range_table
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* containing all the possible analog output ranges. Use the range
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* that matches your board configuration to convert between data
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* values and physical units. The format of the data written to the
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* board is handled automatically based on the unipolar/bipolar
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* range that is selected.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/gfp.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include "../comedidev.h"
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#include "comedi_isadma.h"
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/*
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* Register map
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*/
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#define DT2821_ADCSR_REG 0x00
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#define DT2821_ADCSR_ADERR BIT(15)
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#define DT2821_ADCSR_ADCLK BIT(9)
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#define DT2821_ADCSR_MUXBUSY BIT(8)
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#define DT2821_ADCSR_ADDONE BIT(7)
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#define DT2821_ADCSR_IADDONE BIT(6)
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#define DT2821_ADCSR_GS(x) (((x) & 0x3) << 4)
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#define DT2821_ADCSR_CHAN(x) (((x) & 0xf) << 0)
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#define DT2821_CHANCSR_REG 0x02
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#define DT2821_CHANCSR_LLE BIT(15)
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#define DT2821_CHANCSR_TO_PRESLA(x) (((x) >> 8) & 0xf)
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#define DT2821_CHANCSR_NUMB(x) ((((x) - 1) & 0xf) << 0)
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#define DT2821_ADDAT_REG 0x04
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#define DT2821_DACSR_REG 0x06
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#define DT2821_DACSR_DAERR BIT(15)
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#define DT2821_DACSR_YSEL(x) ((x) << 9)
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#define DT2821_DACSR_SSEL BIT(8)
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#define DT2821_DACSR_DACRDY BIT(7)
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#define DT2821_DACSR_IDARDY BIT(6)
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#define DT2821_DACSR_DACLK BIT(5)
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#define DT2821_DACSR_HBOE BIT(1)
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#define DT2821_DACSR_LBOE BIT(0)
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#define DT2821_DADAT_REG 0x08
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#define DT2821_DIODAT_REG 0x0a
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#define DT2821_SUPCSR_REG 0x0c
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#define DT2821_SUPCSR_DMAD BIT(15)
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#define DT2821_SUPCSR_ERRINTEN BIT(14)
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#define DT2821_SUPCSR_CLRDMADNE BIT(13)
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#define DT2821_SUPCSR_DDMA BIT(12)
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#define DT2821_SUPCSR_DS(x) (((x) & 0x3) << 10)
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#define DT2821_SUPCSR_DS_PIO DT2821_SUPCSR_DS(0)
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#define DT2821_SUPCSR_DS_AD_CLK DT2821_SUPCSR_DS(1)
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#define DT2821_SUPCSR_DS_DA_CLK DT2821_SUPCSR_DS(2)
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#define DT2821_SUPCSR_DS_AD_TRIG DT2821_SUPCSR_DS(3)
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#define DT2821_SUPCSR_BUFFB BIT(9)
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#define DT2821_SUPCSR_SCDN BIT(8)
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#define DT2821_SUPCSR_DACON BIT(7)
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#define DT2821_SUPCSR_ADCINIT BIT(6)
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#define DT2821_SUPCSR_DACINIT BIT(5)
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#define DT2821_SUPCSR_PRLD BIT(4)
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#define DT2821_SUPCSR_STRIG BIT(3)
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#define DT2821_SUPCSR_XTRIG BIT(2)
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#define DT2821_SUPCSR_XCLK BIT(1)
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#define DT2821_SUPCSR_BDINIT BIT(0)
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#define DT2821_TMRCTR_REG 0x0e
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#define DT2821_TMRCTR_PRESCALE(x) (((x) & 0xf) << 8)
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#define DT2821_TMRCTR_DIVIDER(x) ((255 - ((x) & 0xff)) << 0)
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/* Pacer Clock */
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#define DT2821_OSC_BASE 250 /* 4 MHz (in nanoseconds) */
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#define DT2821_PRESCALE(x) BIT(x)
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#define DT2821_PRESCALE_MAX 15
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#define DT2821_DIVIDER_MAX 255
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#define DT2821_OSC_MAX (DT2821_OSC_BASE * \
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DT2821_PRESCALE(DT2821_PRESCALE_MAX) * \
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DT2821_DIVIDER_MAX)
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static const struct comedi_lrange range_dt282x_ai_lo_bipolar = {
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4, {
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BIP_RANGE(10),
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BIP_RANGE(5),
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BIP_RANGE(2.5),
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BIP_RANGE(1.25)
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}
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};
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static const struct comedi_lrange range_dt282x_ai_lo_unipolar = {
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4, {
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UNI_RANGE(10),
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UNI_RANGE(5),
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UNI_RANGE(2.5),
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UNI_RANGE(1.25)
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}
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};
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static const struct comedi_lrange range_dt282x_ai_5_bipolar = {
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4, {
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BIP_RANGE(5),
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BIP_RANGE(2.5),
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BIP_RANGE(1.25),
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BIP_RANGE(0.625)
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}
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};
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static const struct comedi_lrange range_dt282x_ai_5_unipolar = {
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4, {
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UNI_RANGE(5),
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UNI_RANGE(2.5),
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UNI_RANGE(1.25),
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UNI_RANGE(0.625)
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}
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};
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static const struct comedi_lrange range_dt282x_ai_hi_bipolar = {
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4, {
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BIP_RANGE(10),
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BIP_RANGE(1),
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BIP_RANGE(0.1),
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BIP_RANGE(0.02)
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}
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};
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static const struct comedi_lrange range_dt282x_ai_hi_unipolar = {
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4, {
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UNI_RANGE(10),
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UNI_RANGE(1),
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UNI_RANGE(0.1),
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UNI_RANGE(0.02)
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}
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};
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/*
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* The Analog Output range is set per-channel using jumpers on the board.
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* All of these ranges may not be available on some DT2821 series boards.
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* The default jumper setting has both channels set for +/-10V output.
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*/
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static const struct comedi_lrange dt282x_ao_range = {
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5, {
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BIP_RANGE(10),
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BIP_RANGE(5),
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BIP_RANGE(2.5),
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UNI_RANGE(10),
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UNI_RANGE(5),
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}
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};
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struct dt282x_board {
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const char *name;
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unsigned int ai_maxdata;
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int adchan_se;
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int adchan_di;
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int ai_speed;
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int ispgl;
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int dachan;
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unsigned int ao_maxdata;
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};
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static const struct dt282x_board boardtypes[] = {
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{
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.name = "dt2821",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 20000,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2821-f",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 6500,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2821-g",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 4000,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2823",
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.ai_maxdata = 0xffff,
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.adchan_di = 4,
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.ai_speed = 10000,
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.dachan = 2,
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.ao_maxdata = 0xffff,
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}, {
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.name = "dt2824-pgh",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 20000,
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}, {
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.name = "dt2824-pgl",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 20000,
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.ispgl = 1,
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}, {
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.name = "dt2825",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 20000,
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.ispgl = 1,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2827",
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.ai_maxdata = 0xffff,
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.adchan_di = 4,
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.ai_speed = 10000,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2828",
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.ai_maxdata = 0x0fff,
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.adchan_se = 4,
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.ai_speed = 10000,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt2829",
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.ai_maxdata = 0xffff,
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.adchan_se = 8,
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.ai_speed = 33250,
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.dachan = 2,
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.ao_maxdata = 0xffff,
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}, {
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.name = "dt21-ez",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 10000,
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.dachan = 2,
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.ao_maxdata = 0x0fff,
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}, {
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.name = "dt23-ez",
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.ai_maxdata = 0xffff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 10000,
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}, {
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.name = "dt24-ez",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 10000,
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}, {
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.name = "dt24-ez-pgl",
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.ai_maxdata = 0x0fff,
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.adchan_se = 16,
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.adchan_di = 8,
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.ai_speed = 10000,
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.ispgl = 1,
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},
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};
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struct dt282x_private {
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struct comedi_isadma *dma;
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unsigned int ad_2scomp:1;
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unsigned int divisor;
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int dacsr; /* software copies of registers */
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int adcsr;
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int supcsr;
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int ntrig;
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int nread;
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int dma_dir;
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};
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static int dt282x_prep_ai_dma(struct comedi_device *dev, int dma_index, int n)
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{
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struct dt282x_private *devpriv = dev->private;
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struct comedi_isadma *dma = devpriv->dma;
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struct comedi_isadma_desc *desc = &dma->desc[dma_index];
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if (!devpriv->ntrig)
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return 0;
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if (n == 0)
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n = desc->maxsize;
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if (n > devpriv->ntrig * 2)
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n = devpriv->ntrig * 2;
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devpriv->ntrig -= n / 2;
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desc->size = n;
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comedi_isadma_set_mode(desc, devpriv->dma_dir);
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comedi_isadma_program(desc);
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return n;
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}
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static int dt282x_prep_ao_dma(struct comedi_device *dev, int dma_index, int n)
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{
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struct dt282x_private *devpriv = dev->private;
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struct comedi_isadma *dma = devpriv->dma;
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struct comedi_isadma_desc *desc = &dma->desc[dma_index];
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desc->size = n;
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comedi_isadma_set_mode(desc, devpriv->dma_dir);
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comedi_isadma_program(desc);
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return n;
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}
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static void dt282x_disable_dma(struct comedi_device *dev)
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{
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struct dt282x_private *devpriv = dev->private;
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struct comedi_isadma *dma = devpriv->dma;
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struct comedi_isadma_desc *desc;
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int i;
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for (i = 0; i < 2; i++) {
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desc = &dma->desc[i];
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comedi_isadma_disable(desc->chan);
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}
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}
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static unsigned int dt282x_ns_to_timer(unsigned int *ns, unsigned int flags)
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{
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unsigned int prescale, base, divider;
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for (prescale = 0; prescale <= DT2821_PRESCALE_MAX; prescale++) {
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if (prescale == 1) /* 0 and 1 are both divide by 1 */
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continue;
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base = DT2821_OSC_BASE * DT2821_PRESCALE(prescale);
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switch (flags & CMDF_ROUND_MASK) {
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case CMDF_ROUND_NEAREST:
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default:
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divider = DIV_ROUND_CLOSEST(*ns, base);
|
break;
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case CMDF_ROUND_DOWN:
|
divider = (*ns) / base;
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break;
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case CMDF_ROUND_UP:
|
divider = DIV_ROUND_UP(*ns, base);
|
break;
|
}
|
if (divider <= DT2821_DIVIDER_MAX)
|
break;
|
}
|
if (divider > DT2821_DIVIDER_MAX) {
|
prescale = DT2821_PRESCALE_MAX;
|
divider = DT2821_DIVIDER_MAX;
|
base = DT2821_OSC_BASE * DT2821_PRESCALE(prescale);
|
}
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*ns = divider * base;
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return DT2821_TMRCTR_PRESCALE(prescale) |
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DT2821_TMRCTR_DIVIDER(divider);
|
}
|
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static void dt282x_munge(struct comedi_device *dev,
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struct comedi_subdevice *s,
|
unsigned short *buf,
|
unsigned int nbytes)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
unsigned int val;
|
int i;
|
|
if (nbytes % 2)
|
dev_err(dev->class_dev,
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"bug! odd number of bytes from dma xfer\n");
|
|
for (i = 0; i < nbytes / 2; i++) {
|
val = buf[i];
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val &= s->maxdata;
|
if (devpriv->ad_2scomp)
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val = comedi_offset_munge(s, val);
|
|
buf[i] = val;
|
}
|
}
|
|
static unsigned int dt282x_ao_setup_dma(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
int cur_dma)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_isadma *dma = devpriv->dma;
|
struct comedi_isadma_desc *desc = &dma->desc[cur_dma];
|
unsigned int nsamples = comedi_bytes_to_samples(s, desc->maxsize);
|
unsigned int nbytes;
|
|
nbytes = comedi_buf_read_samples(s, desc->virt_addr, nsamples);
|
if (nbytes)
|
dt282x_prep_ao_dma(dev, cur_dma, nbytes);
|
else
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dev_err(dev->class_dev, "AO underrun\n");
|
|
return nbytes;
|
}
|
|
static void dt282x_ao_dma_interrupt(struct comedi_device *dev,
|
struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_isadma *dma = devpriv->dma;
|
struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_CLRDMADNE,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
comedi_isadma_disable(desc->chan);
|
|
if (!dt282x_ao_setup_dma(dev, s, dma->cur_dma))
|
s->async->events |= COMEDI_CB_OVERFLOW;
|
|
dma->cur_dma = 1 - dma->cur_dma;
|
}
|
|
static void dt282x_ai_dma_interrupt(struct comedi_device *dev,
|
struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_isadma *dma = devpriv->dma;
|
struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
|
unsigned int nsamples = comedi_bytes_to_samples(s, desc->size);
|
int ret;
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_CLRDMADNE,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
comedi_isadma_disable(desc->chan);
|
|
dt282x_munge(dev, s, desc->virt_addr, desc->size);
|
ret = comedi_buf_write_samples(s, desc->virt_addr, nsamples);
|
if (ret != desc->size)
|
return;
|
|
devpriv->nread -= nsamples;
|
if (devpriv->nread < 0) {
|
dev_info(dev->class_dev, "nread off by one\n");
|
devpriv->nread = 0;
|
}
|
if (!devpriv->nread) {
|
s->async->events |= COMEDI_CB_EOA;
|
return;
|
}
|
#if 0
|
/* clear the dual dma flag, making this the last dma segment */
|
/* XXX probably wrong */
|
if (!devpriv->ntrig) {
|
devpriv->supcsr &= ~DT2821_SUPCSR_DDMA;
|
outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG);
|
}
|
#endif
|
/* restart the channel */
|
dt282x_prep_ai_dma(dev, dma->cur_dma, 0);
|
|
dma->cur_dma = 1 - dma->cur_dma;
|
}
|
|
static irqreturn_t dt282x_interrupt(int irq, void *d)
|
{
|
struct comedi_device *dev = d;
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_subdevice *s = dev->read_subdev;
|
struct comedi_subdevice *s_ao = dev->write_subdev;
|
unsigned int supcsr, adcsr, dacsr;
|
int handled = 0;
|
|
if (!dev->attached) {
|
dev_err(dev->class_dev, "spurious interrupt\n");
|
return IRQ_HANDLED;
|
}
|
|
adcsr = inw(dev->iobase + DT2821_ADCSR_REG);
|
dacsr = inw(dev->iobase + DT2821_DACSR_REG);
|
supcsr = inw(dev->iobase + DT2821_SUPCSR_REG);
|
if (supcsr & DT2821_SUPCSR_DMAD) {
|
if (devpriv->dma_dir == COMEDI_ISADMA_READ)
|
dt282x_ai_dma_interrupt(dev, s);
|
else
|
dt282x_ao_dma_interrupt(dev, s_ao);
|
handled = 1;
|
}
|
if (adcsr & DT2821_ADCSR_ADERR) {
|
if (devpriv->nread != 0) {
|
dev_err(dev->class_dev, "A/D error\n");
|
s->async->events |= COMEDI_CB_ERROR;
|
}
|
handled = 1;
|
}
|
if (dacsr & DT2821_DACSR_DAERR) {
|
dev_err(dev->class_dev, "D/A error\n");
|
s_ao->async->events |= COMEDI_CB_ERROR;
|
handled = 1;
|
}
|
#if 0
|
if (adcsr & DT2821_ADCSR_ADDONE) {
|
unsigned short data;
|
|
data = inw(dev->iobase + DT2821_ADDAT_REG);
|
data &= s->maxdata;
|
if (devpriv->ad_2scomp)
|
data = comedi_offset_munge(s, data);
|
|
comedi_buf_write_samples(s, &data, 1);
|
|
devpriv->nread--;
|
if (!devpriv->nread) {
|
s->async->events |= COMEDI_CB_EOA;
|
} else {
|
if (supcsr & DT2821_SUPCSR_SCDN)
|
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
|
dev->iobase + DT2821_SUPCSR_REG);
|
}
|
handled = 1;
|
}
|
#endif
|
comedi_handle_events(dev, s);
|
if (s_ao)
|
comedi_handle_events(dev, s_ao);
|
|
return IRQ_RETVAL(handled);
|
}
|
|
static void dt282x_load_changain(struct comedi_device *dev, int n,
|
unsigned int *chanlist)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
int i;
|
|
outw(DT2821_CHANCSR_LLE | DT2821_CHANCSR_NUMB(n),
|
dev->iobase + DT2821_CHANCSR_REG);
|
for (i = 0; i < n; i++) {
|
unsigned int chan = CR_CHAN(chanlist[i]);
|
unsigned int range = CR_RANGE(chanlist[i]);
|
|
outw(devpriv->adcsr |
|
DT2821_ADCSR_GS(range) |
|
DT2821_ADCSR_CHAN(chan),
|
dev->iobase + DT2821_ADCSR_REG);
|
}
|
outw(DT2821_CHANCSR_NUMB(n), dev->iobase + DT2821_CHANCSR_REG);
|
}
|
|
static int dt282x_ai_timeout(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_insn *insn,
|
unsigned long context)
|
{
|
unsigned int status;
|
|
status = inw(dev->iobase + DT2821_ADCSR_REG);
|
switch (context) {
|
case DT2821_ADCSR_MUXBUSY:
|
if ((status & DT2821_ADCSR_MUXBUSY) == 0)
|
return 0;
|
break;
|
case DT2821_ADCSR_ADDONE:
|
if (status & DT2821_ADCSR_ADDONE)
|
return 0;
|
break;
|
default:
|
return -EINVAL;
|
}
|
return -EBUSY;
|
}
|
|
/*
|
* Performs a single A/D conversion.
|
* - Put channel/gain into channel-gain list
|
* - preload multiplexer
|
* - trigger conversion and wait for it to finish
|
*/
|
static int dt282x_ai_insn_read(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_insn *insn,
|
unsigned int *data)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
unsigned int val;
|
int ret;
|
int i;
|
|
/* XXX should we really be enabling the ad clock here? */
|
devpriv->adcsr = DT2821_ADCSR_ADCLK;
|
outw(devpriv->adcsr, dev->iobase + DT2821_ADCSR_REG);
|
|
dt282x_load_changain(dev, 1, &insn->chanspec);
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_PRLD,
|
dev->iobase + DT2821_SUPCSR_REG);
|
ret = comedi_timeout(dev, s, insn,
|
dt282x_ai_timeout, DT2821_ADCSR_MUXBUSY);
|
if (ret)
|
return ret;
|
|
for (i = 0; i < insn->n; i++) {
|
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
ret = comedi_timeout(dev, s, insn,
|
dt282x_ai_timeout, DT2821_ADCSR_ADDONE);
|
if (ret)
|
return ret;
|
|
val = inw(dev->iobase + DT2821_ADDAT_REG);
|
val &= s->maxdata;
|
if (devpriv->ad_2scomp)
|
val = comedi_offset_munge(s, val);
|
|
data[i] = val;
|
}
|
|
return i;
|
}
|
|
static int dt282x_ai_cmdtest(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_cmd *cmd)
|
{
|
const struct dt282x_board *board = dev->board_ptr;
|
struct dt282x_private *devpriv = dev->private;
|
int err = 0;
|
unsigned int arg;
|
|
/* Step 1 : check if triggers are trivially valid */
|
|
err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
|
err |= comedi_check_trigger_src(&cmd->scan_begin_src,
|
TRIG_FOLLOW | TRIG_EXT);
|
err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
|
err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
|
err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
|
|
if (err)
|
return 1;
|
|
/* Step 2a : make sure trigger sources are unique */
|
|
err |= comedi_check_trigger_is_unique(cmd->scan_begin_src);
|
err |= comedi_check_trigger_is_unique(cmd->stop_src);
|
|
/* Step 2b : and mutually compatible */
|
|
if (err)
|
return 2;
|
|
/* Step 3: check if arguments are trivially valid */
|
|
err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
|
err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
|
err |= comedi_check_trigger_arg_max(&cmd->convert_arg, DT2821_OSC_MAX);
|
err |= comedi_check_trigger_arg_min(&cmd->convert_arg, board->ai_speed);
|
err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
|
cmd->chanlist_len);
|
|
if (cmd->stop_src == TRIG_COUNT)
|
err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
|
else /* TRIG_EXT | TRIG_NONE */
|
err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
|
|
if (err)
|
return 3;
|
|
/* step 4: fix up any arguments */
|
|
arg = cmd->convert_arg;
|
devpriv->divisor = dt282x_ns_to_timer(&arg, cmd->flags);
|
err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
|
|
if (err)
|
return 4;
|
|
return 0;
|
}
|
|
static int dt282x_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_isadma *dma = devpriv->dma;
|
struct comedi_cmd *cmd = &s->async->cmd;
|
int ret;
|
|
dt282x_disable_dma(dev);
|
|
outw(devpriv->divisor, dev->iobase + DT2821_TMRCTR_REG);
|
|
devpriv->supcsr = DT2821_SUPCSR_ERRINTEN;
|
if (cmd->scan_begin_src == TRIG_FOLLOW)
|
devpriv->supcsr = DT2821_SUPCSR_DS_AD_CLK;
|
else
|
devpriv->supcsr = DT2821_SUPCSR_DS_AD_TRIG;
|
outw(devpriv->supcsr |
|
DT2821_SUPCSR_CLRDMADNE |
|
DT2821_SUPCSR_BUFFB |
|
DT2821_SUPCSR_ADCINIT,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
devpriv->ntrig = cmd->stop_arg * cmd->scan_end_arg;
|
devpriv->nread = devpriv->ntrig;
|
|
devpriv->dma_dir = COMEDI_ISADMA_READ;
|
dma->cur_dma = 0;
|
dt282x_prep_ai_dma(dev, 0, 0);
|
if (devpriv->ntrig) {
|
dt282x_prep_ai_dma(dev, 1, 0);
|
devpriv->supcsr |= DT2821_SUPCSR_DDMA;
|
outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG);
|
}
|
|
devpriv->adcsr = 0;
|
|
dt282x_load_changain(dev, cmd->chanlist_len, cmd->chanlist);
|
|
devpriv->adcsr = DT2821_ADCSR_ADCLK | DT2821_ADCSR_IADDONE;
|
outw(devpriv->adcsr, dev->iobase + DT2821_ADCSR_REG);
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_PRLD,
|
dev->iobase + DT2821_SUPCSR_REG);
|
ret = comedi_timeout(dev, s, NULL,
|
dt282x_ai_timeout, DT2821_ADCSR_MUXBUSY);
|
if (ret)
|
return ret;
|
|
if (cmd->scan_begin_src == TRIG_FOLLOW) {
|
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
|
dev->iobase + DT2821_SUPCSR_REG);
|
} else {
|
devpriv->supcsr |= DT2821_SUPCSR_XTRIG;
|
outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG);
|
}
|
|
return 0;
|
}
|
|
static int dt282x_ai_cancel(struct comedi_device *dev,
|
struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
|
dt282x_disable_dma(dev);
|
|
devpriv->adcsr = 0;
|
outw(devpriv->adcsr, dev->iobase + DT2821_ADCSR_REG);
|
|
devpriv->supcsr = 0;
|
outw(devpriv->supcsr | DT2821_SUPCSR_ADCINIT,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
return 0;
|
}
|
|
static int dt282x_ao_insn_write(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_insn *insn,
|
unsigned int *data)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
unsigned int chan = CR_CHAN(insn->chanspec);
|
unsigned int range = CR_RANGE(insn->chanspec);
|
int i;
|
|
devpriv->dacsr |= DT2821_DACSR_SSEL | DT2821_DACSR_YSEL(chan);
|
|
for (i = 0; i < insn->n; i++) {
|
unsigned int val = data[i];
|
|
s->readback[chan] = val;
|
|
if (comedi_range_is_bipolar(s, range))
|
val = comedi_offset_munge(s, val);
|
|
outw(devpriv->dacsr, dev->iobase + DT2821_DACSR_REG);
|
|
outw(val, dev->iobase + DT2821_DADAT_REG);
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_DACON,
|
dev->iobase + DT2821_SUPCSR_REG);
|
}
|
|
return insn->n;
|
}
|
|
static int dt282x_ao_cmdtest(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_cmd *cmd)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
int err = 0;
|
unsigned int arg;
|
|
/* Step 1 : check if triggers are trivially valid */
|
|
err |= comedi_check_trigger_src(&cmd->start_src, TRIG_INT);
|
err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_TIMER);
|
err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW);
|
err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
|
err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
|
|
if (err)
|
return 1;
|
|
/* Step 2a : make sure trigger sources are unique */
|
|
err |= comedi_check_trigger_is_unique(cmd->stop_src);
|
|
/* Step 2b : and mutually compatible */
|
|
if (err)
|
return 2;
|
|
/* Step 3: check if arguments are trivially valid */
|
|
err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
|
err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, 5000);
|
err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
|
err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
|
cmd->chanlist_len);
|
|
if (cmd->stop_src == TRIG_COUNT)
|
err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
|
else /* TRIG_EXT | TRIG_NONE */
|
err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
|
|
if (err)
|
return 3;
|
|
/* step 4: fix up any arguments */
|
|
arg = cmd->scan_begin_arg;
|
devpriv->divisor = dt282x_ns_to_timer(&arg, cmd->flags);
|
err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
|
|
if (err)
|
return 4;
|
|
return 0;
|
}
|
|
static int dt282x_ao_inttrig(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
unsigned int trig_num)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_cmd *cmd = &s->async->cmd;
|
|
if (trig_num != cmd->start_src)
|
return -EINVAL;
|
|
if (!dt282x_ao_setup_dma(dev, s, 0))
|
return -EPIPE;
|
|
if (!dt282x_ao_setup_dma(dev, s, 1))
|
return -EPIPE;
|
|
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
|
dev->iobase + DT2821_SUPCSR_REG);
|
s->async->inttrig = NULL;
|
|
return 1;
|
}
|
|
static int dt282x_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
struct comedi_isadma *dma = devpriv->dma;
|
struct comedi_cmd *cmd = &s->async->cmd;
|
|
dt282x_disable_dma(dev);
|
|
devpriv->supcsr = DT2821_SUPCSR_ERRINTEN |
|
DT2821_SUPCSR_DS_DA_CLK |
|
DT2821_SUPCSR_DDMA;
|
outw(devpriv->supcsr |
|
DT2821_SUPCSR_CLRDMADNE |
|
DT2821_SUPCSR_BUFFB |
|
DT2821_SUPCSR_DACINIT,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
devpriv->ntrig = cmd->stop_arg * cmd->chanlist_len;
|
devpriv->nread = devpriv->ntrig;
|
|
devpriv->dma_dir = COMEDI_ISADMA_WRITE;
|
dma->cur_dma = 0;
|
|
outw(devpriv->divisor, dev->iobase + DT2821_TMRCTR_REG);
|
|
/* clear all bits but the DIO direction bits */
|
devpriv->dacsr &= (DT2821_DACSR_LBOE | DT2821_DACSR_HBOE);
|
|
devpriv->dacsr |= (DT2821_DACSR_SSEL |
|
DT2821_DACSR_DACLK |
|
DT2821_DACSR_IDARDY);
|
outw(devpriv->dacsr, dev->iobase + DT2821_DACSR_REG);
|
|
s->async->inttrig = dt282x_ao_inttrig;
|
|
return 0;
|
}
|
|
static int dt282x_ao_cancel(struct comedi_device *dev,
|
struct comedi_subdevice *s)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
|
dt282x_disable_dma(dev);
|
|
/* clear all bits but the DIO direction bits */
|
devpriv->dacsr &= (DT2821_DACSR_LBOE | DT2821_DACSR_HBOE);
|
|
outw(devpriv->dacsr, dev->iobase + DT2821_DACSR_REG);
|
|
devpriv->supcsr = 0;
|
outw(devpriv->supcsr | DT2821_SUPCSR_DACINIT,
|
dev->iobase + DT2821_SUPCSR_REG);
|
|
return 0;
|
}
|
|
static int dt282x_dio_insn_bits(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_insn *insn,
|
unsigned int *data)
|
{
|
if (comedi_dio_update_state(s, data))
|
outw(s->state, dev->iobase + DT2821_DIODAT_REG);
|
|
data[1] = inw(dev->iobase + DT2821_DIODAT_REG);
|
|
return insn->n;
|
}
|
|
static int dt282x_dio_insn_config(struct comedi_device *dev,
|
struct comedi_subdevice *s,
|
struct comedi_insn *insn,
|
unsigned int *data)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
unsigned int chan = CR_CHAN(insn->chanspec);
|
unsigned int mask;
|
int ret;
|
|
if (chan < 8)
|
mask = 0x00ff;
|
else
|
mask = 0xff00;
|
|
ret = comedi_dio_insn_config(dev, s, insn, data, mask);
|
if (ret)
|
return ret;
|
|
devpriv->dacsr &= ~(DT2821_DACSR_LBOE | DT2821_DACSR_HBOE);
|
if (s->io_bits & 0x00ff)
|
devpriv->dacsr |= DT2821_DACSR_LBOE;
|
if (s->io_bits & 0xff00)
|
devpriv->dacsr |= DT2821_DACSR_HBOE;
|
|
outw(devpriv->dacsr, dev->iobase + DT2821_DACSR_REG);
|
|
return insn->n;
|
}
|
|
static const struct comedi_lrange *const ai_range_table[] = {
|
&range_dt282x_ai_lo_bipolar,
|
&range_dt282x_ai_lo_unipolar,
|
&range_dt282x_ai_5_bipolar,
|
&range_dt282x_ai_5_unipolar
|
};
|
|
static const struct comedi_lrange *const ai_range_pgl_table[] = {
|
&range_dt282x_ai_hi_bipolar,
|
&range_dt282x_ai_hi_unipolar
|
};
|
|
static const struct comedi_lrange *opt_ai_range_lkup(int ispgl, int x)
|
{
|
if (ispgl) {
|
if (x < 0 || x >= 2)
|
x = 0;
|
return ai_range_pgl_table[x];
|
}
|
|
if (x < 0 || x >= 4)
|
x = 0;
|
return ai_range_table[x];
|
}
|
|
static void dt282x_alloc_dma(struct comedi_device *dev,
|
struct comedi_devconfig *it)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
unsigned int irq_num = it->options[1];
|
unsigned int dma_chan[2];
|
|
if (it->options[2] < it->options[3]) {
|
dma_chan[0] = it->options[2];
|
dma_chan[1] = it->options[3];
|
} else {
|
dma_chan[0] = it->options[3];
|
dma_chan[1] = it->options[2];
|
}
|
|
if (!irq_num || dma_chan[0] == dma_chan[1] ||
|
dma_chan[0] < 5 || dma_chan[0] > 7 ||
|
dma_chan[1] < 5 || dma_chan[1] > 7)
|
return;
|
|
if (request_irq(irq_num, dt282x_interrupt, 0, dev->board_name, dev))
|
return;
|
|
/* DMA uses two 4K buffers with separate DMA channels */
|
devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan[0], dma_chan[1],
|
PAGE_SIZE, 0);
|
if (!devpriv->dma)
|
free_irq(irq_num, dev);
|
else
|
dev->irq = irq_num;
|
}
|
|
static void dt282x_free_dma(struct comedi_device *dev)
|
{
|
struct dt282x_private *devpriv = dev->private;
|
|
if (devpriv)
|
comedi_isadma_free(devpriv->dma);
|
}
|
|
static int dt282x_initialize(struct comedi_device *dev)
|
{
|
/* Initialize board */
|
outw(DT2821_SUPCSR_BDINIT, dev->iobase + DT2821_SUPCSR_REG);
|
inw(dev->iobase + DT2821_ADCSR_REG);
|
|
/*
|
* At power up, some registers are in a well-known state.
|
* Check them to see if a DT2821 series board is present.
|
*/
|
if (((inw(dev->iobase + DT2821_ADCSR_REG) & 0xfff0) != 0x7c00) ||
|
((inw(dev->iobase + DT2821_CHANCSR_REG) & 0xf0f0) != 0x70f0) ||
|
((inw(dev->iobase + DT2821_DACSR_REG) & 0x7c93) != 0x7c90) ||
|
((inw(dev->iobase + DT2821_SUPCSR_REG) & 0xf8ff) != 0x0000) ||
|
((inw(dev->iobase + DT2821_TMRCTR_REG) & 0xff00) != 0xf000)) {
|
dev_err(dev->class_dev, "board not found\n");
|
return -EIO;
|
}
|
return 0;
|
}
|
|
static int dt282x_attach(struct comedi_device *dev, struct comedi_devconfig *it)
|
{
|
const struct dt282x_board *board = dev->board_ptr;
|
struct dt282x_private *devpriv;
|
struct comedi_subdevice *s;
|
int ret;
|
|
ret = comedi_request_region(dev, it->options[0], 0x10);
|
if (ret)
|
return ret;
|
|
ret = dt282x_initialize(dev);
|
if (ret)
|
return ret;
|
|
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
|
if (!devpriv)
|
return -ENOMEM;
|
|
/* an IRQ and 2 DMA channels are required for async command support */
|
dt282x_alloc_dma(dev, it);
|
|
ret = comedi_alloc_subdevices(dev, 3);
|
if (ret)
|
return ret;
|
|
/* Analog Input subdevice */
|
s = &dev->subdevices[0];
|
s->type = COMEDI_SUBD_AI;
|
s->subdev_flags = SDF_READABLE;
|
if ((it->options[4] && board->adchan_di) || board->adchan_se == 0) {
|
s->subdev_flags |= SDF_DIFF;
|
s->n_chan = board->adchan_di;
|
} else {
|
s->subdev_flags |= SDF_COMMON;
|
s->n_chan = board->adchan_se;
|
}
|
s->maxdata = board->ai_maxdata;
|
|
s->range_table = opt_ai_range_lkup(board->ispgl, it->options[8]);
|
devpriv->ad_2scomp = it->options[5] ? 1 : 0;
|
|
s->insn_read = dt282x_ai_insn_read;
|
if (dev->irq) {
|
dev->read_subdev = s;
|
s->subdev_flags |= SDF_CMD_READ;
|
s->len_chanlist = s->n_chan;
|
s->do_cmdtest = dt282x_ai_cmdtest;
|
s->do_cmd = dt282x_ai_cmd;
|
s->cancel = dt282x_ai_cancel;
|
}
|
|
/* Analog Output subdevice */
|
s = &dev->subdevices[1];
|
if (board->dachan) {
|
s->type = COMEDI_SUBD_AO;
|
s->subdev_flags = SDF_WRITABLE;
|
s->n_chan = board->dachan;
|
s->maxdata = board->ao_maxdata;
|
/* ranges are per-channel, set by jumpers on the board */
|
s->range_table = &dt282x_ao_range;
|
s->insn_write = dt282x_ao_insn_write;
|
if (dev->irq) {
|
dev->write_subdev = s;
|
s->subdev_flags |= SDF_CMD_WRITE;
|
s->len_chanlist = s->n_chan;
|
s->do_cmdtest = dt282x_ao_cmdtest;
|
s->do_cmd = dt282x_ao_cmd;
|
s->cancel = dt282x_ao_cancel;
|
}
|
|
ret = comedi_alloc_subdev_readback(s);
|
if (ret)
|
return ret;
|
} else {
|
s->type = COMEDI_SUBD_UNUSED;
|
}
|
|
/* Digital I/O subdevice */
|
s = &dev->subdevices[2];
|
s->type = COMEDI_SUBD_DIO;
|
s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
|
s->n_chan = 16;
|
s->maxdata = 1;
|
s->range_table = &range_digital;
|
s->insn_bits = dt282x_dio_insn_bits;
|
s->insn_config = dt282x_dio_insn_config;
|
|
return 0;
|
}
|
|
static void dt282x_detach(struct comedi_device *dev)
|
{
|
dt282x_free_dma(dev);
|
comedi_legacy_detach(dev);
|
}
|
|
static struct comedi_driver dt282x_driver = {
|
.driver_name = "dt282x",
|
.module = THIS_MODULE,
|
.attach = dt282x_attach,
|
.detach = dt282x_detach,
|
.board_name = &boardtypes[0].name,
|
.num_names = ARRAY_SIZE(boardtypes),
|
.offset = sizeof(struct dt282x_board),
|
};
|
module_comedi_driver(dt282x_driver);
|
|
MODULE_AUTHOR("Comedi http://www.comedi.org");
|
MODULE_DESCRIPTION("Comedi driver for Data Translation DT2821 series");
|
MODULE_LICENSE("GPL");
|
