/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef PP_HWMGR_PPT_H
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#define PP_HWMGR_PPT_H
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#include "hardwaremanager.h"
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#include "smumgr.h"
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#include "atom-types.h"
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struct phm_ppt_v1_clock_voltage_dependency_record {
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uint32_t clk;
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uint8_t vddInd;
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uint8_t vddciInd;
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uint8_t mvddInd;
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uint16_t vdd_offset;
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uint16_t vddc;
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uint16_t vddgfx;
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uint16_t vddci;
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uint16_t mvdd;
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uint8_t phases;
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uint8_t cks_enable;
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uint8_t cks_voffset;
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uint32_t sclk_offset;
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};
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typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;
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struct phm_ppt_v1_clock_voltage_dependency_table {
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uint32_t count; /* Number of entries. */
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phm_ppt_v1_clock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
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};
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typedef struct phm_ppt_v1_clock_voltage_dependency_table phm_ppt_v1_clock_voltage_dependency_table;
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/* Multimedia Clock Voltage Dependency records and table */
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struct phm_ppt_v1_mm_clock_voltage_dependency_record {
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uint32_t dclk; /* UVD D-clock */
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uint32_t vclk; /* UVD V-clock */
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uint32_t eclk; /* VCE clock */
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uint32_t aclk; /* ACP clock */
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uint32_t samclock; /* SAMU clock */
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uint8_t vddcInd;
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uint16_t vddgfx_offset;
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uint16_t vddc;
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uint16_t vddgfx;
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uint8_t phases;
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};
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typedef struct phm_ppt_v1_mm_clock_voltage_dependency_record phm_ppt_v1_mm_clock_voltage_dependency_record;
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struct phm_ppt_v1_mm_clock_voltage_dependency_table {
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uint32_t count; /* Number of entries. */
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phm_ppt_v1_mm_clock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
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};
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typedef struct phm_ppt_v1_mm_clock_voltage_dependency_table phm_ppt_v1_mm_clock_voltage_dependency_table;
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struct phm_ppt_v1_voltage_lookup_record {
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uint16_t us_calculated;
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uint16_t us_vdd; /* Base voltage */
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uint16_t us_cac_low;
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uint16_t us_cac_mid;
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uint16_t us_cac_high;
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};
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typedef struct phm_ppt_v1_voltage_lookup_record phm_ppt_v1_voltage_lookup_record;
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struct phm_ppt_v1_voltage_lookup_table {
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uint32_t count;
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phm_ppt_v1_voltage_lookup_record entries[1]; /* Dynamically allocate count entries. */
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};
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typedef struct phm_ppt_v1_voltage_lookup_table phm_ppt_v1_voltage_lookup_table;
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/* PCIE records and Table */
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struct phm_ppt_v1_pcie_record {
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uint8_t gen_speed;
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uint8_t lane_width;
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uint16_t usreserved;
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uint16_t reserved;
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uint32_t pcie_sclk;
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};
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typedef struct phm_ppt_v1_pcie_record phm_ppt_v1_pcie_record;
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struct phm_ppt_v1_pcie_table {
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uint32_t count; /* Number of entries. */
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phm_ppt_v1_pcie_record entries[1]; /* Dynamically allocate count entries. */
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};
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typedef struct phm_ppt_v1_pcie_table phm_ppt_v1_pcie_table;
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struct phm_ppt_v1_gpio_table {
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uint8_t vrhot_triggered_sclk_dpm_index; /* SCLK DPM level index to switch to when VRHot is triggered */
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};
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typedef struct phm_ppt_v1_gpio_table phm_ppt_v1_gpio_table;
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#endif
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