// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
/*
|
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
*
|
*/
|
|
/dts-v1/;
|
|
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/pinctrl/rockchip.h>
|
#include "rk3568j.dtsi"
|
|
/ {
|
model = "Rockchip RK3568J CORE DDR4 V10 Board";
|
compatible = "rockchip,rk3568j-core-ddr4-v10", "rockchip,rk3568";
|
|
chosen: chosen {
|
bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait";
|
};
|
|
fiq-debugger {
|
compatible = "rockchip,fiq-debugger";
|
rockchip,serial-id = <2>;
|
rockchip,wake-irq = <0>;
|
/* If enable uart uses irq instead of fiq */
|
rockchip,irq-mode-enable = <1>;
|
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
|
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&uart2m0_xfer>;
|
status = "okay";
|
};
|
|
debug: debug@fd904000 {
|
compatible = "rockchip,debug";
|
reg = <0x0 0xfd904000 0x0 0x1000>,
|
<0x0 0xfd905000 0x0 0x1000>,
|
<0x0 0xfd906000 0x0 0x1000>,
|
<0x0 0xfd907000 0x0 0x1000>;
|
};
|
|
cspmu: cspmu@fd90c000 {
|
compatible = "rockchip,cspmu";
|
reg = <0x0 0xfd90c000 0x0 0x1000>,
|
<0x0 0xfd90d000 0x0 0x1000>,
|
<0x0 0xfd90e000 0x0 0x1000>,
|
<0x0 0xfd90f000 0x0 0x1000>;
|
};
|
|
dc_12v: dc-12v {
|
compatible = "regulator-fixed";
|
regulator-name = "dc_12v";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <12000000>;
|
regulator-max-microvolt = <12000000>;
|
};
|
|
vcc5v0_sys: vcc5v0-sys {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc5v0_sys";
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
vin-supply = <&dc_12v>;
|
};
|
|
vcc5v0_host: vcc5v0-host-regulator {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc5v0_host";
|
regulator-boot-on;
|
regulator-always-on;
|
regulator-min-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
enable-active-high;
|
gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
vin-supply = <&vcc5v0_sys>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&vcc5v0_host_en>;
|
};
|
|
vcc5v0_otg: vcc5v0-otg-regulator {
|
compatible = "regulator-fixed";
|
regulator-name = "vcc5v0_otg";
|
regulator-min-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
enable-active-high;
|
gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
vin-supply = <&vcc5v0_sys>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&vcc5v0_otg_en>;
|
};
|
};
|
|
&can1 {
|
assigned-clocks = <&cru CLK_CAN1>;
|
assigned-clock-rates = <150000000>;
|
pinctrl-names = "default";
|
pinctrl-0 = <&can1m1_pins>;
|
status = "okay";
|
};
|
|
&cpu0 {
|
cpu-supply = <&vdd_cpu>;
|
};
|
|
&dfi {
|
status = "okay";
|
};
|
|
&dmc {
|
center-supply = <&vdd_logic>;
|
status = "okay";
|
};
|
|
&gmac0 {
|
phy-mode = "rgmii";
|
clock_in_out = "output";
|
|
snps,reset-gpio = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
|
snps,reset-active-low;
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
snps,reset-delays-us = <0 20000 100000>;
|
|
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
|
assigned-clock-rates = <0>, <125000000>;
|
|
pinctrl-names = "default";
|
pinctrl-0 = <&gmac0_miim
|
&gmac0_tx_bus2
|
&gmac0_rx_bus2
|
&gmac0_rgmii_clk
|
&gmac0_rgmii_bus>;
|
tx_delay = <0x3c>;
|
rx_delay = <0x2f>;
|
phy-handle = <&rgmii_phy0>;
|
status = "okay";
|
};
|
|
&gmac1_clkin {
|
clock-frequency = <50000000>;
|
};
|
|
&gmac1 {
|
phy-mode = "rmii";
|
clock_in_out = "input";
|
|
snps,reset-gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
|
snps,reset-active-low;
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
snps,reset-delays-us = <0 20000 100000>;
|
|
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
assigned-clock-parents = <&cru SCLK_GMAC1_RMII_SPEED>, <&gmac1_clkin>;
|
assigned-clock-rates = <0>, <50000000>;
|
|
pinctrl-names = "default";
|
pinctrl-0 = <&gmac1m0_miim
|
&gmac1m0_clkinout
|
&gmac1m0_tx_bus2
|
&gmac1m0_rx_bus2>;
|
tx_delay = <0x4f>;
|
rx_delay = <0x26>;
|
phy-handle = <&rgmii_phy1>;
|
status = "okay";
|
};
|
|
&i2c0 {
|
status = "okay";
|
|
rk809: pmic@20 {
|
compatible = "rockchip,rk809";
|
reg = <0x20>;
|
interrupt-parent = <&gpio0>;
|
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default", "pmic-sleep",
|
"pmic-power-off", "pmic-reset";
|
pinctrl-0 = <&pmic_int>;
|
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
|
|
rockchip,system-power-controller;
|
wakeup-source;
|
#clock-cells = <1>;
|
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
//fb-inner-reg-idxs = <2>;
|
/* 1: rst regs (default in codes), 0: rst the pmic */
|
pmic-reset-func = <0>;
|
/* not save the PMIC_POWER_EN register in uboot */
|
not-save-power-en = <1>;
|
|
vcc1-supply = <&vcc5v0_sys>;
|
vcc2-supply = <&vcc5v0_sys>;
|
vcc3-supply = <&vcc5v0_sys>;
|
vcc4-supply = <&vcc5v0_sys>;
|
vcc5-supply = <&vcc3v3_sys>;
|
vcc6-supply = <&vcc3v3_sys>;
|
vcc7-supply = <&vcc3v3_sys>;
|
vcc8-supply = <&vcc3v3_sys>;
|
vcc9-supply = <&vcc5v0_sys>;
|
|
pwrkey {
|
status = "okay";
|
};
|
|
pinctrl_rk8xx: pinctrl_rk8xx {
|
gpio-controller;
|
#gpio-cells = <2>;
|
|
rk817_slppin_null: rk817_slppin_null {
|
pins = "gpio_slp";
|
function = "pin_fun0";
|
};
|
|
rk817_slppin_slp: rk817_slppin_slp {
|
pins = "gpio_slp";
|
function = "pin_fun1";
|
};
|
|
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
pins = "gpio_slp";
|
function = "pin_fun2";
|
};
|
|
rk817_slppin_rst: rk817_slppin_rst {
|
pins = "gpio_slp";
|
function = "pin_fun3";
|
};
|
};
|
|
regulators {
|
vdd_logic: DCDC_REG1 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <500000>;
|
regulator-max-microvolt = <1350000>;
|
regulator-init-microvolt = <900000>;
|
regulator-ramp-delay = <6001>;
|
regulator-initial-mode = <0x2>;
|
regulator-name = "vdd_logic";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vdd_cpu: DCDC_REG2 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <500000>;
|
regulator-max-microvolt = <1350000>;
|
regulator-init-microvolt = <900000>;
|
regulator-ramp-delay = <6001>;
|
regulator-initial-mode = <0x2>;
|
regulator-name = "vdd_cpu";
|
regulator-state-mem {
|
regulator-off-iemmcn-suspend;
|
};
|
};
|
|
vcc_ddr: DCDC_REG3 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-initial-mode = <0x2>;
|
regulator-name = "vcc_ddr";
|
regulator-state-mem {
|
regulator-on-in-suspend;
|
};
|
};
|
|
vdd_buck4: DCDC_REG4 {
|
regulator-ramp-delay = <6001>;
|
regulator-initial-mode = <0x2>;
|
regulator-name = "vdd_buck4";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vdda_0v9: LDO_REG1 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <900000>;
|
regulator-max-microvolt = <900000>;
|
regulator-name = "vdda_0v9";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcca_1v8: LDO_REG2 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
regulator-name = "vcca_1v8";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo3: LDO_REG3 {
|
regulator-name = "vcc_ldo3";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_1v8: LDO_REG4 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <1800000>;
|
regulator-max-microvolt = <1800000>;
|
regulator-name = "vcc_1v8";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo5: LDO_REG5 {
|
regulator-name = "vcc_ldo5";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo6: LDO_REG6 {
|
regulator-name = "vcc_ldo6";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo7: LDO_REG7 {
|
regulator-name = "vcc_ldo7";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo8: LDO_REG8 {
|
regulator-name = "vcc_ldo8";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_ldo9: LDO_REG9 {
|
regulator-name = "vcc_ldo9";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc3v3_sys: DCDC_REG5 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-min-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
regulator-name = "vcc3v3_sys";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_sw1: SWITCH_REG1 {
|
regulator-name = "vcc_sw1";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
|
vcc_3v3: SWITCH_REG2 {
|
regulator-always-on;
|
regulator-boot-on;
|
regulator-name = "vcc_3v3";
|
regulator-state-mem {
|
regulator-off-in-suspend;
|
};
|
};
|
};
|
};
|
};
|
|
&i2c1 {
|
status = "okay";
|
};
|
|
&i2c4 {
|
pinctrl-names = "default";
|
pinctrl-0 = <&i2c4m1_xfer>;
|
status = "okay";
|
};
|
|
&i2c5 {
|
pinctrl-names = "default";
|
pinctrl-0 = <&i2c5m1_xfer>;
|
status = "okay";
|
};
|
|
&mdio0 {
|
rgmii_phy0: phy@0 {
|
compatible = "ethernet-phy-ieee802.3-c22";
|
reg = <0x0>;
|
};
|
};
|
|
&mdio1 {
|
rgmii_phy1: phy@0 {
|
compatible = "ethernet-phy-ieee802.3-c22";
|
reg = <0x0>;
|
};
|
};
|
|
&pinctrl {
|
pmic {
|
pmic_int: pmic_int {
|
rockchip,pins =
|
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
};
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
rockchip,pins =
|
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
|
};
|
|
soc_slppin_slp: soc_slppin_slp {
|
rockchip,pins =
|
<0 RK_PA2 1 &pcfg_pull_up>;
|
};
|
|
soc_slppin_rst: soc_slppin_rst {
|
rockchip,pins =
|
<0 RK_PA2 2 &pcfg_pull_none>;
|
};
|
};
|
|
usb {
|
vcc5v0_host_en: vcc5v0-host-en {
|
rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
};
|
|
vcc5v0_otg_en: vcc5v0-otg-en {
|
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
};
|
};
|
};
|
|
&pmu_io_domains {
|
status = "okay";
|
pmuio2-supply = <&vcc_3v3>;
|
vccio1-supply = <&vcc_3v3>;
|
vccio3-supply = <&vcc_3v3>;
|
vccio4-supply = <&vcc_3v3>;
|
vccio5-supply = <&vcc_3v3>;
|
vccio6-supply = <&vcc_3v3>;
|
vccio7-supply = <&vcc_3v3>;
|
|
};
|
|
&pwm3 {
|
status = "okay";
|
};
|
|
&pwm4 {
|
status = "okay";
|
};
|
|
&pwm14 {
|
pinctrl-0 = <&pwm14m1_pins>;
|
status = "okay";
|
};
|
|
&pwm15 {
|
pinctrl-0 = <&pwm15m1_pins>;
|
status = "okay";
|
};
|
|
&reserved_memory {
|
ramoops: ramoops@110000 {
|
compatible = "ramoops";
|
reg = <0x0 0x110000 0x0 0xf0000>;
|
record-size = <0x20000>;
|
console-size = <0x80000>;
|
ftrace-size = <0x00000>;
|
pmsg-size = <0x50000>;
|
};
|
};
|
|
&rng {
|
status = "okay";
|
};
|
|
&saradc {
|
status = "okay";
|
vref-supply = <&vcca_1v8>;
|
};
|
|
&sdhci {
|
bus-width = <8>;
|
supports-emmc;
|
non-removable;
|
max-frequency = <200000000>;
|
status = "okay";
|
};
|
|
&spi0 {
|
status = "okay";
|
};
|
|
&spi1 {
|
status = "okay";
|
pinctrl-names = "default", "high_speed";
|
pinctrl-0 = <&spi1m1_cs0 &spi1m0_cs1 &spi1m1_pins>;
|
pinctrl-1 = <&spi1m1_cs0 &spi1m0_cs1 &spi1m1_pins_hs>;
|
};
|
|
&spi2 {
|
status = "okay";
|
pinctrl-names = "default", "high_speed";
|
pinctrl-0 = <&spi2m1_cs0 &spi2m1_cs1 &spi2m1_pins>;
|
pinctrl-1 = <&spi2m1_cs0 &spi2m1_cs1 &spi2m1_pins_hs>;
|
};
|
|
&tsadc {
|
status = "okay";
|
};
|
|
&uart0 {
|
status = "okay";
|
};
|
|
&uart3 {
|
status = "okay";
|
};
|
|
&uart4 {
|
status = "okay";
|
};
|
|
&uart5 {
|
status = "okay";
|
};
|
|
&uart6 {
|
status = "okay";
|
pinctrl-0 = <&uart6m1_xfer>;
|
};
|
|
&uart9 {
|
status = "okay";
|
pinctrl-0 = <&uart9m1_xfer>;
|
};
|
|
&u2phy0_otg {
|
vbus-supply = <&vcc5v0_otg>;
|
status = "okay";
|
};
|
|
&u2phy1_host {
|
phy-supply = <&vcc5v0_host>;
|
status = "okay";
|
};
|
|
&u2phy1_otg {
|
vbus-supply = <&vcc5v0_host>;
|
status = "okay";
|
};
|
|
&usb2phy0 {
|
status = "okay";
|
};
|
|
&usb2phy1 {
|
status = "okay";
|
};
|
|
&usb_host0_ehci {
|
status = "okay";
|
};
|
|
&usb_host0_ohci {
|
status = "okay";
|
};
|
|
&usb_host1_ehci {
|
status = "okay";
|
};
|
|
&usb_host1_ohci {
|
status = "okay";
|
};
|
|
&usbdrd_dwc3 {
|
extcon = <&usb2phy0>;
|
phys = <&u2phy0_otg>;
|
phy-names = "usb2-phy";
|
maximum-speed = "high-speed";
|
snps,dis_u2_susphy_quirk;
|
status = "okay";
|
};
|
|
&usbdrd30 {
|
status = "okay";
|
};
|
