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#define REG_Page 0xFF
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// Page0
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#define P0REG_MACBEHAVIOR 0x01
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#define P0REG_L2FRAMEGETCTRL 0x04
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#define P0REG_L2FRAMEGETCTRL1 0x05
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#define P0REG_BPDUPORTCAPCFG 0x0A
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#define P0REG_QOS8021PBASEPRIEN 0x26
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#define P0REG_QOSDSCPBASEPRIEN 0x27
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#define P0REG_QOSDSCPPRISETTING0 0x28
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#define P0REG_QOSDSCPPRISETTING1 0x29
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#define P0REG_QOSDSCPVALUE0 0x2A
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#define P0REG_QOSIPBASEPRIEN 0x31
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#define P0REG_INGRESS_RATE_CTRL0 0x40
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#define P0REG_TEST_PACKET_CTRL 0x4D
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#define P0REG_TEST_RESULT 0x4E
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#define P0REG_MACADDRESS 0x84
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#define P0REG_COSPORTBASEPRIEN 0x60
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#define P0REG_COS8021PBASEPRIEN 0x62
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#define P0REG_COSDSCPBASEPRIEN 0x64
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#define P0REG_COSTCPUDPBASEPRIEN 0x21
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#define P0REG_COSMACBASEPRIEN 0x66
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#define P0REG_COSVIDBASEPRIEN 0x68
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#define P0REG_COSIGMPBASEPRIEN 0x6A
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#define P0REG_COSPORTBASEQUEUE0 0x70
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#define P0REG_COSPORTBASEQUEUE1 0x71
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#define P0REG_COSPORTBASEQUEUE2 0x72
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#define P0REG_COSDSCPPRISETTING0 0x76
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#define P0REG_COSDSCPPRISETTING1 0x77
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#define P0REG_COSDSCPVALUE0 0x78
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#define P0REG_COSDSCPVALUE1 0x79
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#define P0REG_COSDSCPVALUE2 0x7A
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#define P0REG_COSDSCPVALUE3 0x7B
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#define P0REG_TCPUDPUSERDEF 0x10
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#define P0REG_TCPUDPPRICFG 0x18
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#define P0REG_TCPUDFUNCEN 0x1F
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#define P0REG_L3FRAMEGETCTRL 0x07
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#define P0REG_TCPCHECKEN 0x23
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#define P0REG_UDPCHECKEN 0x25
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#define P0REG_TCPFLGCFGGLB 0x30
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#define P0REG_TCPFLGCFG0 0x32
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#define P0REG_TCPFLGPORTEN 0x38
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#define P0REG_PORTLOCKEN 0x91
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#define P0REG_IPV6RLTCFG 0xA1
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#define P0REG_IPV6RLTFWD 0xA2
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#define POREG_MIBCOUN_CMD 0xA7
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#define POREG_MIBCOUN_DATA_L 0xA8
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#define POREG_MIBCOUN_DATA_H 0xA9
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#define P0REG_LDCONFIG 0xC0
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#define P0REG_LDEN 0xC1
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#define P0REG_LDTIMER 0xC3
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#define P0REG_LDSTATUS 0xCB
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#define P0REG_LDDA0 0xC4
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#define P0REG_LDSUBTYPE 0xC8
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#define P0REG_PTPCFG 0xA0
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// Page 1
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#define P1REG_CONFIG_CPUPORT 0x01
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#define P1REG_LUTAGINGTIME 0x02
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#define P1REG_SRCLEARNCFG 0x03
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#define P1REG_SRCLEARN_ENABLE 0x04
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#define P1REG_BSTORMTHRESH 0x09
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#define P1REG_ARPSTORMCFG 0x0A
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#define P1REG_ICMPSTORMCFG 0x0B
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#define P1REG_BSTORMEN 0x0C
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#define P1REG_MSTORMEN 0x0E
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#define P1REG_DLFSTORMEN 0x10
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#define P1REG_ARPSTORMEN 0x12
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#define P1REG_ICMPSTORMEN 0x14
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#define P1REG_OAM_8023_LB_CFG 0x14
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#define P1REG_TRUNKCFG 0x16
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#define P1REG_TRUNKGRP 0x17
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#define P1REG_SNIFCFG 0x1A
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#define P1REG_SNIFDEST 0x1B
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#define P1REG_SNIFSRC 0x1D
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#define P1REG_MEM_COMMAND 0x1D
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#define P1REG_MEM_TABLE_0 0x1E
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#define P1REG_PORTFLUSH 0x25
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#define P1REG_LUTFLUSH_CFG 0x27
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#define P1REG_LUTCFG 0x28
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#define P1REG_LUTDATA_0 0x29
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#define P1REG_LUTDATA_1 0x2A
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#define P1REG_LUTDATA_2 0x2B
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#define P1REG_LUTDATA_3 0x2C
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#define P1REG_LUTDATA_4 0x2D
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#define P1REG_LUTDATA_5 0x2E
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#define P1REG_MISCCFG 0x2F
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#define P1REG_MEM_MCT_COMMAND 0xA0
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#define P1REG_MEM_MCT_TABLE_0 0xA1
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#define P1REG_IGMPSNOP 0xA8
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#define P1REG_IGMPPKTFWD_0 0xA9
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#define P1REG_IGMPPKTFWD_1 0xAA
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#define P1REG_ROUTLIST 0xAE
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#define P1REG_MEM_SLT_COMMAND 0xB0
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#define P1REG_MEM_SLT_TABLE_0 0xB1
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#define P1REG_ACL_PATTEM_LOCATION_D3 0xD3
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#define P1REG_ACL_PATTEM_LOCATION_D4 0xD4
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#define P1REG_ACL_STORM_0 0xD7
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#define P1REG_ACL_BW_01 0xD7
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#define P1REG_ACL_TABLE_ACCESS 0xE0
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#define P1REG_ACL_TABLE_DATA_E1 0xE1
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#define P1REG_ACL_TABLE_DATA_E2 0xE2
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#define P1REG_ACL_TABLE_DATA_E3 0xE3
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#define P1REG_ACL_TABLE_DATA_E4 0xE4
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#define P1REG_ACL_TABLE_DATA_E5 0xE5
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#define P1REG_ACL_TABLE_DATA_E6 0xE6
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#define P1REG_ACL_TABLE_DATA_E7 0xE7
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#define P1REG_ACL_TABLE_DATA_E8 0xE8
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#define P1REG_ACL_TABLE_DATA_E9 0xE9
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#define P1REG_ACL_TABLE_DATA_EA 0xEA
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// Page2
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#define P2REG_VLANCFG 0x01
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#define P2REG_VLAN_INACTIVE_VID 0x02
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#define P2REG_VLAN_INGRESS_FRAME_0 0x04 //bit 0 for per port
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#define P2REG_VLAN_INGRESS_FRAME_1 0x06 //bit 1 for per port
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#define P2REG_VLAN_INGRESS_CHK 0x0A
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#define P2REG_VLANLOCAL 0x0C
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#define P2REG_VLAN_EGRESS_CFG 0x0E
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#define P2REG_VLAN_EGRESS_CFG1 0x10
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#define P2REG_VLAN_EXCLUSIVE 0x11
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#define P2REG_VLAN_ADDTAG 0x13
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#define P2REG_VLAN_RMVTAG 0x15
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#define P2REG_VLAN_UPLINK 0x17
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#define P2REG_VLAN_PVIDCFG 0x20
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#define P2REG_VLANGROUP 0x40
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#define P2REG_VLAN_MACBASED_ENTRY_0 0x80
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#define P2REG_VLAN_MACBASED_UNKNOWN 0x9B
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#define P2REG_VLAN_PROCOTOL_CFG 0xA0
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#define P2REG_SPANTREE_PORTCMD 0xB2
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#define P2REG_SPANTREE_PORTDTA 0xB3
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#define P2REG_VLANCMD 0xB5
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#define P2REG_VLANDAT0 0xB6
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#define P2REG_ACL_VID_REMARK_00 0xD0
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#define P2REG_HSR_REG_SETTING_1 0xFC
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#define P2REG_HSR_REG_SETTING_2 0xFD
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// Page 3
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#define P3REG_AN 0x01
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#define P3REG_SPG 0x02
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#define P3REG_SP 0x03
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#define P3REG_DUPLEX 0x04
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#define P3REG_PAUSE 0x05
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#define P3REG_ASPAUSE 0x06
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#define P3REG_BPRESS 0x07
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#define P3REG_POWERDOWN 0x08
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#define P3REG_UNIDIRECT 0x09
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#define P3REG_PORTSTS0 0x10
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#define P3REG_FORCELINK 0x24
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// Page4
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#define P4REG_OAM_8023AH_DYING_GASP 0x01
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#define P4REG_OAM_8023AH_CFG0 0x02
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#define P4REG_OAM_8023AH_REMOTE_CMD0 0x08
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#define P4REG_OAM_8023AH_REMOTE_DAT0 0x09
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#define P4REG_OAM_8023AH_STAT0 0x10
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#define P4REG_OAM_8023AH_REMOTE_INFO_OUI 0x1B
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#define P4REG_OAM_8023AH_RECV_DAT0 0x1D
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#define P4REG_OAM_8023AH_RECV_CMD0 0x1E
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#define P4REG_OAM_8023AH_FAULT_RECORD 0x1F
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// Page 6
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#define P6REG_QOS_REMAP_RX0 0x19
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// Page 7
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#define P7REG_QINQ_RMVTAG 0x01
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#define P7REG_QINQ_ADDTAG 0x02
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#define P7REG_QINQEGTYPELEN 0x03
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#define P7REG_QINQ_DET_RX 0x05
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#define P7REG_QINQ_DATA 0x06
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#define P7REG_QINQ_P_DATA 0x16
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#define P7REG_DSCP_REMARKING_01 0x22
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#define P7REG_TXDMA 0x33
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// Page8
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#define P8REG_QOSMODESELGROUP1 0x01
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#define P8REG_QOSGP1_WEIGHT0 0x02
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#define P8REG_QOSGP1_MAXBDWT0 0x0A
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#define P8REG_EGRESS_RATE_CTRL0 0x4C
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#define P8REG_OUT_QUEUE_PARAM 0x5E
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#define P8REG_QOSAGINGTIME 0x37
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#define P8REG_QOSPORTAGINGEN0 0x38
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#define P8REG_QOS_REMAP_TX0 0x11
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#define P8REG_QOSGROUPSEL 0x3F
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#define P8REG_QOSMODESELGROUP2 0x3E
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#define P8REG_QOSGP2_WEIGHT0 0x40
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#define P8REG_QOSGP2_MAXBDWT0 0x48
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#define P8REG_QOSQUEUEDBMEN 0x36
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#define P8REG_QOS_SBMDBMSEL0 0x30
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// Page9
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#define P9REG_PTP_CLOCK_RESET 0x00
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#define P9REG_PTP_TIMESTAMP_READ 0x01
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#define P9REG_PTP_CONFIGURATION 0x02
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#define P9REG_PTP_PORT_TIMESTAMP0 0x03
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#define P9REG_PTP_PORT_TIMESTAMP1 0x04
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#define P9REG_PTP_TIMESTAMP_CLEAR0 0x05
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#define P9REG_PTP_TIMESTAMP_CLEAR1 0x06
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#define P9REG_PTP_TIMEDATA_NANOSEC0 0x07
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#define P9REG_PTP_TIMEDATA_NANOSEC1 0x08
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#define P9REG_PTP_TIMEDATA_SEC0 0x09
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#define P9REG_PTP_TIMEDATA_SEC1 0x0A
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#define P9REG_PTP_TIMEDATA_SEC2 0x0B
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#define P9REG_PTP_CLOCK_CONTROL 0x0C
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#define P9REG_PTP_FREQUENCY_ADD0 0x0D
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#define P9REG_PTP_FREQUENCY_ADD1 0x0E
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#define P9REG_PTP_CLOCK_PERIOD 0x0F
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#define P9REG_PTP_FREQUENCY_COMPENSATION0 0x10
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#define P9REG_PTP_FREQUENCY_COMPENSATION1 0x11
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#define P9REG_PTP_FREQUENCY_COMPENSATION2 0x12
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#define P9REG_PTP_FREQUENCY_COMPENSATION3 0x13
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#define P9REG_PTP_FREQUENCY_COMPENSATION_CONTROL 0x14
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#define P9REG_PTP_PROGRAMMABLE_OUTPUT 0x15
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#define P9REG_PTP_INGRESS_LATENCY_10TP 0x1A
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#define P9REG_PTP_EGRESS_LATENCY_10TP 0x1B
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#define P9REG_PTP_INGRESS_LATENCY_100TP 0x1C
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#define P9REG_PTP_EGRESS_LATENCY_100TP 0x1D
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#define P9REG_PTP_INGRESS_LATENCY_FIBER 0x20
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#define P9REG_PTP_EGRESS_LATENCY_FIBER 0x21
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// PageD
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// PageE
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#define PEREG_SW_RESET 0x00
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#define PEREG_CPUMODE 0x03
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#define PEREG_SPTAG 0x05
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#define PEREG_INT_STATUS 0x07
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#define PEREG_LAST_GASP_CONFIG 0x08
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#define PEREG_EEPROM_CMD 0x0A
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#define PEREG_EEPROM_DATA 0x0C
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