/*
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* linux/arch/unicore32/include/asm/fpu-ucf64.h
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
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* Copyright (C) 2001-2010 Guan Xuetao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define FPSCR s31
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/* FPSCR bits */
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#define FPSCR_DEFAULT_NAN (1<<25)
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#define FPSCR_CMPINSTR_BIT (1<<31)
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#define FPSCR_CON (1<<29)
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#define FPSCR_TRAP (1<<27)
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/* RND mode */
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#define FPSCR_ROUND_NEAREST (0<<0)
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#define FPSCR_ROUND_PLUSINF (2<<0)
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#define FPSCR_ROUND_MINUSINF (3<<0)
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#define FPSCR_ROUND_TOZERO (1<<0)
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#define FPSCR_RMODE_BIT (0)
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#define FPSCR_RMODE_MASK (7 << FPSCR_RMODE_BIT)
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/* trap enable */
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#define FPSCR_IOE (1<<16)
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#define FPSCR_OFE (1<<14)
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#define FPSCR_UFE (1<<13)
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#define FPSCR_IXE (1<<12)
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#define FPSCR_HIE (1<<11)
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#define FPSCR_NDE (1<<10) /* non denomal */
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/* flags */
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#define FPSCR_IDC (1<<24)
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#define FPSCR_HIC (1<<23)
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#define FPSCR_IXC (1<<22)
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#define FPSCR_OFC (1<<21)
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#define FPSCR_UFC (1<<20)
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#define FPSCR_IOC (1<<19)
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/* stick bits */
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#define FPSCR_IOS (1<<9)
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#define FPSCR_OFS (1<<7)
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#define FPSCR_UFS (1<<6)
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#define FPSCR_IXS (1<<5)
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#define FPSCR_HIS (1<<4)
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#define FPSCR_NDS (1<<3) /*non denomal */
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