/*
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* (C) 2010,2011 Thomas Renninger <trenn@suse.de>, Novell Inc.
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*
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* Licensed under the terms of the GNU GPL License version 2.
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*
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* Based on SandyBridge monitor. Implements the new package C-states
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* (PC8, PC9, PC10) coming with a specific Haswell (family 0x45) CPU.
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*/
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#if defined(__i386__) || defined(__x86_64__)
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "helpers/helpers.h"
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#include "idle_monitor/cpupower-monitor.h"
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#define MSR_PKG_C8_RESIDENCY 0x00000630
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#define MSR_PKG_C9_RESIDENCY 0x00000631
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#define MSR_PKG_C10_RESIDENCY 0x00000632
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#define MSR_TSC 0x10
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enum intel_hsw_ext_id { PC8 = 0, PC9, PC10, HSW_EXT_CSTATE_COUNT,
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TSC = 0xFFFF };
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static int hsw_ext_get_count_percent(unsigned int self_id, double *percent,
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unsigned int cpu);
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static cstate_t hsw_ext_cstates[HSW_EXT_CSTATE_COUNT] = {
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{
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.name = "PC8",
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.desc = N_("Processor Package C8"),
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.id = PC8,
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.range = RANGE_PACKAGE,
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.get_count_percent = hsw_ext_get_count_percent,
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},
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{
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.name = "PC9",
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.desc = N_("Processor Package C9"),
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.id = PC9,
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.range = RANGE_PACKAGE,
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.get_count_percent = hsw_ext_get_count_percent,
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},
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{
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.name = "PC10",
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.desc = N_("Processor Package C10"),
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.id = PC10,
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.range = RANGE_PACKAGE,
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.get_count_percent = hsw_ext_get_count_percent,
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},
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};
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static unsigned long long tsc_at_measure_start;
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static unsigned long long tsc_at_measure_end;
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static unsigned long long *previous_count[HSW_EXT_CSTATE_COUNT];
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static unsigned long long *current_count[HSW_EXT_CSTATE_COUNT];
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/* valid flag for all CPUs. If a MSR read failed it will be zero */
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static int *is_valid;
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static int hsw_ext_get_count(enum intel_hsw_ext_id id, unsigned long long *val,
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unsigned int cpu)
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{
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int msr;
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switch (id) {
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case PC8:
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msr = MSR_PKG_C8_RESIDENCY;
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break;
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case PC9:
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msr = MSR_PKG_C9_RESIDENCY;
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break;
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case PC10:
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msr = MSR_PKG_C10_RESIDENCY;
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break;
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case TSC:
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msr = MSR_TSC;
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break;
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default:
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return -1;
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};
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if (read_msr(cpu, msr, val))
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return -1;
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return 0;
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}
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static int hsw_ext_get_count_percent(unsigned int id, double *percent,
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unsigned int cpu)
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{
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*percent = 0.0;
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if (!is_valid[cpu])
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return -1;
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*percent = (100.0 *
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(current_count[id][cpu] - previous_count[id][cpu])) /
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(tsc_at_measure_end - tsc_at_measure_start);
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dprint("%s: previous: %llu - current: %llu - (%u)\n",
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hsw_ext_cstates[id].name, previous_count[id][cpu],
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current_count[id][cpu], cpu);
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dprint("%s: tsc_diff: %llu - count_diff: %llu - percent: %2.f (%u)\n",
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hsw_ext_cstates[id].name,
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(unsigned long long) tsc_at_measure_end - tsc_at_measure_start,
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current_count[id][cpu] - previous_count[id][cpu],
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*percent, cpu);
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return 0;
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}
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static int hsw_ext_start(void)
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{
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int num, cpu;
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unsigned long long val;
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for (num = 0; num < HSW_EXT_CSTATE_COUNT; num++) {
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for (cpu = 0; cpu < cpu_count; cpu++) {
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hsw_ext_get_count(num, &val, cpu);
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previous_count[num][cpu] = val;
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}
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}
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hsw_ext_get_count(TSC, &tsc_at_measure_start, base_cpu);
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return 0;
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}
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static int hsw_ext_stop(void)
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{
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unsigned long long val;
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int num, cpu;
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hsw_ext_get_count(TSC, &tsc_at_measure_end, base_cpu);
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for (num = 0; num < HSW_EXT_CSTATE_COUNT; num++) {
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for (cpu = 0; cpu < cpu_count; cpu++) {
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is_valid[cpu] = !hsw_ext_get_count(num, &val, cpu);
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current_count[num][cpu] = val;
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}
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}
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return 0;
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}
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struct cpuidle_monitor intel_hsw_ext_monitor;
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static struct cpuidle_monitor *hsw_ext_register(void)
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{
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int num;
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if (cpupower_cpu_info.vendor != X86_VENDOR_INTEL
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|| cpupower_cpu_info.family != 6)
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return NULL;
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switch (cpupower_cpu_info.model) {
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case 0x45: /* HSW */
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break;
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default:
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return NULL;
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}
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is_valid = calloc(cpu_count, sizeof(int));
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for (num = 0; num < HSW_EXT_CSTATE_COUNT; num++) {
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previous_count[num] = calloc(cpu_count,
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sizeof(unsigned long long));
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current_count[num] = calloc(cpu_count,
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sizeof(unsigned long long));
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}
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intel_hsw_ext_monitor.name_len = strlen(intel_hsw_ext_monitor.name);
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return &intel_hsw_ext_monitor;
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}
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void hsw_ext_unregister(void)
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{
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int num;
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free(is_valid);
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for (num = 0; num < HSW_EXT_CSTATE_COUNT; num++) {
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free(previous_count[num]);
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free(current_count[num]);
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}
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}
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struct cpuidle_monitor intel_hsw_ext_monitor = {
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.name = "HaswellExtended",
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.hw_states = hsw_ext_cstates,
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.hw_states_num = HSW_EXT_CSTATE_COUNT,
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.start = hsw_ext_start,
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.stop = hsw_ext_stop,
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.do_register = hsw_ext_register,
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.unregister = hsw_ext_unregister,
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.needs_root = 1,
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.overflow_s = 922000000 /* 922337203 seconds TSC overflow
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at 20GHz */
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};
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#endif /* defined(__i386__) || defined(__x86_64__) */
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