// SPDX-License-Identifier: GPL-2.0
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/*
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* Rockchip Audio PWM Driver
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*
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* Copyright (C) 2020 Fuzhou Rockchip Electronics Co.,Ltd
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*
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include "rockchip_audio_pwm.h"
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#define AUDIO_PWM_DMA_BURST_SIZE (16) /* size * width: 16*4 = 64 bytes */
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struct rk_audio_pwm_dev {
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struct device *dev;
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struct clk *clk;
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struct clk *hclk;
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struct regmap *regmap;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct gpio_desc *spk_ctl_gpio;
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int interpolat_points;
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int sample_width_bits;
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};
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static inline struct rk_audio_pwm_dev *to_info(struct snd_soc_dai *dai)
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{
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return snd_soc_dai_get_drvdata(dai);
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}
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static void rockchip_audio_spk_ctl(struct rk_audio_pwm_dev *apwm, int on)
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{
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if (apwm->spk_ctl_gpio)
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gpiod_direction_output(apwm->spk_ctl_gpio, on);
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}
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static void rockchip_audio_pwm_xfer(struct rk_audio_pwm_dev *apwm, int on)
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{
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if (on) {
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regmap_write(apwm->regmap, AUDPWM_FIFO_CFG, AUDPWM_DMA_EN);
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regmap_write(apwm->regmap, AUDPWM_XFER, AUDPWM_XFER_START);
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rockchip_audio_spk_ctl(apwm, on);
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} else {
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rockchip_audio_spk_ctl(apwm, on);
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regmap_write(apwm->regmap, AUDPWM_FIFO_CFG, AUDPWM_DMA_DIS);
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regmap_write(apwm->regmap, AUDPWM_XFER, AUDPWM_XFER_STOP);
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}
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}
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static int rockchip_audio_pwm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct rk_audio_pwm_dev *apwm = to_info(dai);
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unsigned long rate;
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int ret;
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rate = params_rate(params) << apwm->sample_width_bits;
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if (apwm->interpolat_points) {
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rate *= (apwm->interpolat_points + 1);
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regmap_write(apwm->regmap, AUDPWM_PWM_CFG,
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AUDPWM_LINEAR_INTERP_EN |
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AUDPWM_INTERP_RATE(apwm->interpolat_points));
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}
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if (!rate)
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return -EINVAL;
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ret = clk_set_rate(apwm->clk, rate);
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if (ret)
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return -EINVAL;
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regmap_write(apwm->regmap, AUDPWM_SRC_CFG,
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AUDPWM_SRC_WIDTH(params_width(params)));
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regmap_write(apwm->regmap, AUDPWM_PWM_CFG,
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AUDPWM_SAMPLE_WIDTH(apwm->sample_width_bits));
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regmap_write(apwm->regmap, AUDPWM_FIFO_CFG,
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AUDPWM_DMA_WATERMARK(16));
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return 0;
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}
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static int rockchip_audio_pwm_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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struct rk_audio_pwm_dev *apwm = to_info(dai);
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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rockchip_audio_pwm_xfer(apwm, 1);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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rockchip_audio_pwm_xfer(apwm, 0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int rockchip_audio_pwm_dai_probe(struct snd_soc_dai *dai)
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{
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struct rk_audio_pwm_dev *apwm = to_info(dai);
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dai->playback_dma_data = &apwm->playback_dma_data;
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return 0;
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}
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static const struct snd_soc_dai_ops rockchip_audio_pwm_dai_ops = {
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.trigger = rockchip_audio_pwm_trigger,
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.hw_params = rockchip_audio_pwm_hw_params,
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};
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#define ROCKCHIP_AUDIO_PWM_RATES SNDRV_PCM_RATE_8000_48000
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#define ROCKCHIP_AUDIO_PWM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver rockchip_audio_pwm_dai = {
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.probe = rockchip_audio_pwm_dai_probe,
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = ROCKCHIP_AUDIO_PWM_RATES,
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.formats = ROCKCHIP_AUDIO_PWM_FORMATS,
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},
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.ops = &rockchip_audio_pwm_dai_ops,
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};
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static const struct snd_soc_component_driver rockchip_audio_pwm_component = {
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.name = "rockchip-audio-pwm",
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};
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static int __maybe_unused rockchip_audio_pwm_runtime_suspend(struct device *dev)
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{
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struct rk_audio_pwm_dev *apwm = dev_get_drvdata(dev);
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regcache_cache_only(apwm->regmap, true);
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clk_disable_unprepare(apwm->clk);
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clk_disable_unprepare(apwm->hclk);
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return 0;
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}
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static int __maybe_unused rockchip_audio_pwm_runtime_resume(struct device *dev)
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{
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struct rk_audio_pwm_dev *apwm = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(apwm->clk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(apwm->hclk);
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if (ret)
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return ret;
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regcache_cache_only(apwm->regmap, false);
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regcache_mark_dirty(apwm->regmap);
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ret = regcache_sync(apwm->regmap);
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if (ret) {
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clk_disable_unprepare(apwm->clk);
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clk_disable_unprepare(apwm->hclk);
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}
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return 0;
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}
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static bool rockchip_audio_pwm_wr_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AUDPWM_XFER:
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case AUDPWM_SRC_CFG:
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case AUDPWM_PWM_CFG:
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case AUDPWM_FIFO_CFG:
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case AUDPWM_FIFO_INT_EN:
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case AUDPWM_FIFO_INT_ST:
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case AUDPWM_FIFO_ENTRY:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_audio_pwm_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case AUDPWM_VERSION:
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case AUDPWM_XFER:
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case AUDPWM_SRC_CFG:
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case AUDPWM_PWM_CFG:
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case AUDPWM_PWM_ST:
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case AUDPWM_PWM_BUF_01:
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case AUDPWM_PWM_BUF_23:
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case AUDPWM_FIFO_CFG:
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case AUDPWM_FIFO_LVL:
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case AUDPWM_FIFO_INT_EN:
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case AUDPWM_FIFO_INT_ST:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_audio_pwm_volatile_reg(struct device *dev,
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unsigned int reg)
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{
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switch (reg) {
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case AUDPWM_XFER:
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case AUDPWM_PWM_ST:
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case AUDPWM_PWM_BUF_01:
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case AUDPWM_PWM_BUF_23:
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case AUDPWM_FIFO_LVL:
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case AUDPWM_FIFO_INT_ST:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config rockchip_audio_pwm_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = AUDPWM_FIFO_ENTRY,
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.writeable_reg = rockchip_audio_pwm_wr_reg,
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.readable_reg = rockchip_audio_pwm_rd_reg,
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.volatile_reg = rockchip_audio_pwm_volatile_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct of_device_id rockchip_audio_pwm_match[] = {
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{ .compatible = "rockchip,audio-pwm-v1" },
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{},
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};
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MODULE_DEVICE_TABLE(of, rockchip_audio_pwm_match);
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static int rockchip_audio_pwm_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct rk_audio_pwm_dev *apwm;
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struct resource *res;
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void __iomem *regs;
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int ret;
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int val;
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apwm = devm_kzalloc(&pdev->dev, sizeof(*apwm), GFP_KERNEL);
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if (!apwm)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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apwm->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
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&rockchip_audio_pwm_config);
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if (IS_ERR(apwm->regmap))
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return PTR_ERR(apwm->regmap);
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apwm->playback_dma_data.addr = res->start + AUDPWM_FIFO_ENTRY;
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apwm->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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apwm->playback_dma_data.maxburst = AUDIO_PWM_DMA_BURST_SIZE;
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apwm->dev = &pdev->dev;
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dev_set_drvdata(&pdev->dev, apwm);
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apwm->clk = devm_clk_get(&pdev->dev, "clk");
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if (IS_ERR(apwm->clk))
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return PTR_ERR(apwm->clk);
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apwm->hclk = devm_clk_get(&pdev->dev, "hclk");
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if (IS_ERR(apwm->hclk))
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return PTR_ERR(apwm->hclk);
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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ret = rockchip_audio_pwm_runtime_resume(&pdev->dev);
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if (ret)
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goto err_pm_disable;
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}
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apwm->sample_width_bits = 8;
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of_property_read_u32(np, "rockchip,sample-width-bits", &val);
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if (val >= 8 && val <= 11)
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apwm->sample_width_bits = val;
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of_property_read_u32(np, "rockchip,interpolat-points",
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&apwm->interpolat_points);
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apwm->spk_ctl_gpio = devm_gpiod_get_optional(&pdev->dev, "spk-ctl",
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GPIOD_OUT_LOW);
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if (!apwm->spk_ctl_gpio) {
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dev_info(&pdev->dev, "no need spk-ctl gpio\n");
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} else if (IS_ERR(apwm->spk_ctl_gpio)) {
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ret = PTR_ERR(apwm->spk_ctl_gpio);
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dev_err(&pdev->dev, "fail to request gpio spk-ctl\n");
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goto err_suspend;
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}
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ret = devm_snd_soc_register_component(&pdev->dev,
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&rockchip_audio_pwm_component,
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&rockchip_audio_pwm_dai, 1);
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if (ret) {
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dev_err(&pdev->dev, "could not register dai: %d\n", ret);
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goto err_suspend;
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}
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
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if (ret) {
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dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
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goto err_suspend;
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}
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return 0;
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err_suspend:
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if (!pm_runtime_status_suspended(&pdev->dev))
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rockchip_audio_pwm_runtime_suspend(&pdev->dev);
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err_pm_disable:
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pm_runtime_disable(&pdev->dev);
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return ret;
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}
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static int rockchip_audio_pwm_remove(struct platform_device *pdev)
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{
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pm_runtime_disable(&pdev->dev);
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if (!pm_runtime_status_suspended(&pdev->dev))
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rockchip_audio_pwm_runtime_suspend(&pdev->dev);
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return 0;
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}
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static const struct dev_pm_ops rockchip_audio_pwm_pm_ops = {
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SET_RUNTIME_PM_OPS(rockchip_audio_pwm_runtime_suspend,
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rockchip_audio_pwm_runtime_resume, NULL)
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};
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static struct platform_driver rockchip_audio_pwm_driver = {
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.probe = rockchip_audio_pwm_probe,
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.remove = rockchip_audio_pwm_remove,
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.driver = {
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.name = "rockchip-audio-pwm",
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.of_match_table = of_match_ptr(rockchip_audio_pwm_match),
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.pm = &rockchip_audio_pwm_pm_ops,
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},
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};
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module_platform_driver(rockchip_audio_pwm_driver);
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MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");
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MODULE_DESCRIPTION("Rockchip Audio PWM Driver");
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MODULE_LICENSE("GPL v2");
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