Device-Tree bindings for Rockchip Video Codec.
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Required properties:
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- compatible: There are several vcodec IP inside rockchip chips.
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Decoder should be one of following:
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"rockchip,vpu-decoder-v1",
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"rockchip,avs-plus-decoder",
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"rockchip,vpu-decoder-v2",
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"rockchip,vpu-decoder-px30",
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"rockchip,vpu-decoder-rk3288",
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"rockchip,vpu-decoder-rk3368",
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"rockchip,hevc-decoder",
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"rockchip,hevc-decoder-px30",
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"rockchip,hevc-decoder-rk3368",
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"rockchip,rkv-decoder-v1",
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"rockchip,rkv-decoder-v2",
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"rockchip,rkv-decoder-rk3568",
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"rockchip,rkv-decoder-rk3399",
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"rockchip,rkv-decoder-rk3328",
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"rockchip,rkv-jpeg-decoder-v1",
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Encoder should be one of following:
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"rockchip,vpu-encoder-v1",
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"rockchip,vpu-encoder-v2",
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"rockchip,vpu-encoder-px30",
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"rockchip,rkv-encoder-v1",
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"rockchip,rkv-encoder-v2",
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"rockchip,rkv-encoder-rv1108",
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"rockchip,hevc-encoder-v22",
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- rockchip,srv: The pointer of service device node.
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the value must be the name of service device, like <&mpp_srv>.
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- rockchip,taskqueue-node: The taskqueue node number of current device working.
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the value must between 0 and rockchip,taskqueue-count
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- rockchip,resetgroup-node: The resetgroup node number of current reset group.
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If two devices have the same reset clk, they should in the same reset group.
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the value must between 0 and rockchip,resetgroup-count
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- reset-name: The name of reset clk.
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If two devices have the same reset clk, the reset-name should stay the same
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and add "shared_" prefix.
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Example:
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DT entry:
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vdpu: vdpu@ff650400 {
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compatible = "rockchip,vpu-decoder-v2";
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reg = <0x0 0xff650400 0x0 0x400>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "irq_dec";
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clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
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clock-names = "aclk_vcodec", "hclk_vcodec";
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resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
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reset-names = "shared_video_h", "shared_video_a";
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iommus = <&vpu_mmu>;
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power-domains = <&power RK3399_PD_VCODEC>;
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rockchip,srv = <&mpp_srv>;
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rockchip,taskqueue-node = <0>;
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rockchip,resetgroup-node = <0>;
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status = "disabled";
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};
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vepu: vepu@ff650000 {
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compatible = "rockchip,vpu-encoder-v2";
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reg = <0x0 0xff650000 0x0 0x400>;
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "irq_enc";
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clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
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clock-names = "aclk_vcodec", "hclk_vcodec";
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resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
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reset-names = "shared_video_h", "shared_video_a";
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iommus = <&vpu_mmu>;
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rockchip,srv = <&mpp_srv>;
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rockchip,taskqueue-node = <0>;
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rockchip,resetgroup-node = <0>;
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power-domains = <&power RK3399_PD_VCODEC>;
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status = "disabled";
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};
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vpu_mmu: iommu@ff650800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff650800 0x0 0x40>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "vpu_mmu";
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clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
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clock-names = "aclk", "iface";
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power-domains = <&power RK3399_PD_VCODEC>;
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#iommu-cells = <0>;
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status = "disabled";
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};
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