1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
| Ux500 MUSB
|
| Required properties:
| - compatible : Should be "stericsson,db8500-musb"
| - reg : Offset and length of registers
| - interrupts : Interrupt; mode, number and trigger
| - dr_mode : Dual-role; either host mode "host", peripheral mode "peripheral"
| or both "otg"
|
| Optional properties:
| - dmas : A list of dma channels;
| dma-controller, event-line, fixed-channel, flags
| - dma-names : An ordered list of channel names affiliated to the above
|
| Example:
|
| usb_per5@a03e0000 {
| compatible = "stericsson,db8500-musb";
| reg = <0xa03e0000 0x10000>;
| interrupts = <0 23 0x4>;
| interrupt-names = "mc";
|
| dr_mode = "otg";
|
| dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
| <&dma 38 0 0x0>, /* Logical - MemToDev */
| <&dma 37 0 0x2>, /* Logical - DevToMem */
| <&dma 37 0 0x0>, /* Logical - MemToDev */
| <&dma 36 0 0x2>, /* Logical - DevToMem */
| <&dma 36 0 0x0>, /* Logical - MemToDev */
| <&dma 19 0 0x2>, /* Logical - DevToMem */
| <&dma 19 0 0x0>, /* Logical - MemToDev */
| <&dma 18 0 0x2>, /* Logical - DevToMem */
| <&dma 18 0 0x0>, /* Logical - MemToDev */
| <&dma 17 0 0x2>, /* Logical - DevToMem */
| <&dma 17 0 0x0>, /* Logical - MemToDev */
| <&dma 16 0 0x2>, /* Logical - DevToMem */
| <&dma 16 0 0x0>, /* Logical - MemToDev */
| <&dma 39 0 0x2>, /* Logical - DevToMem */
| <&dma 39 0 0x0>; /* Logical - MemToDev */
|
| dma-names = "iep_1_9", "oep_1_9",
| "iep_2_10", "oep_2_10",
| "iep_3_11", "oep_3_11",
| "iep_4_12", "oep_4_12",
| "iep_5_13", "oep_5_13",
| "iep_6_14", "oep_6_14",
| "iep_7_15", "oep_7_15",
| "iep_8", "oep_8";
| };
|
|
