* Rockchip I2S/TDM controller
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Required properties:
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- compatible: should be one of the following
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- "rockchip,px30-i2s-tdm": for px30
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- "rockchip,rk1808-i2s-tdm": for rk1808
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- "rockchip,rk3308-i2s-tdm": for rk3308
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- "rockchip,rk3568-i2s-tdm": for rk3568
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- "rockchip,rv1126-i2s-tdm": for rv1126
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: should contain the I2S interrupt.
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- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "tx" and "rx".
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- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
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- clock-names: clock names.
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- rockchip,bclk-fs: configure the bclk fs.
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- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
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- reset-names: reset names, should include "tx-m", "rx-m".
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- rockchip,cru: cru phandle.
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- rockchip,grf: the phandle of the syscon node for GRF register.
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- rockchip,mclk-calibrate: enable mclk source calibration.
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- rockchip,clk-trcm: tx and rx lrck/bclk common use.
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- 0: both tx_lrck/bclk and rx_lrck/bclk are used
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- 1: only tx_lrck/bclk is used
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- 2: only rx_lrck/bclk is used
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- rockchip,no-dmaengine: This is a boolean property. If present, driver will do not
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register pcm dmaengine, only just register dai. if the dai is part of multi-dais,
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the property should be present. Please refer to rockchip,multidais.txt about
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multi-dais usage.
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- rockchip,playback-only: Specify that the controller only has playback capability.
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- rockchip,capture-only: Specify that the controller only has capture capability.
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Optional properties:
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- rockchip,i2s-rx-route: This is a variable length array, that shows the mapping
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route of i2s rx sdis to I2S data bus. By default, they are one-to-one mapping:
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* sdi_0 <-- data_0
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* sdi_1 <-- data_1
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* sdi_2 <-- data_2
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* sdi_3 <-- data_3
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If you would like to change the order of I2S RX data, the route mapping may
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like this:
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* sdi_3 <-- data_0
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* sdi_1 <-- data_1
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* sdi_2 <-- data_2
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* sdi_0 <-- data_3
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You need to add the property for i2s node on dts:
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- rockchip,i2s-rx-route = <3 1 2 0>;
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- rockchip,i2s-tx-route: This is a variable length array, that shows the mapping
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route of i2s tx sdos to I2S data bus. By default, they are one-to-one mapping:
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* sdo_0 --> data_0
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* sdo_1 --> data_1
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* sdo_2 --> data_2
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* sdo_3 --> data_3
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If you would like to change the order of I2S TX data, the route mapping may
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like this:
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* sdo_2 --> data_0
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* sdo_1 --> data_1
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* sdo_0 --> data_2
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* sdo_3 --> data_3
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You need to add the property for i2s node on dts:
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- rockchip,i2s-tx-route = <2 1 0 3>;
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- rockchip,tdm-fsync-half-frame: This is a boolean value, if present, use half
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frame fsync.
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Example for rk3308 I2S/TDM controller:
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i2s_8ch_0: i2s@ff300000 {
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compatible = "rockchip,rk3308-i2s-tdm";
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reg = <0x0 0xff300000 0x0 0x1000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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dmas = <&dmac1 0>, <&dmac1 1>;
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dma-names = "tx", "rx";
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resets = <&cru SRST_I2S0_8CH_TX_M>, <&cru SRST_I2S0_8CH_RX_M>;
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reset-names = "tx-m", "rx-m";
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rockchip,cru = <&cru>;
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rockchip,clk-trcm = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s_8ch_0_sclktx
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&i2s_8ch_0_sclkrx
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&i2s_8ch_0_lrcktx
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&i2s_8ch_0_lrckrx
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&i2s_8ch_0_sdi0
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&i2s_8ch_0_sdi1
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&i2s_8ch_0_sdi2
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&i2s_8ch_0_sdi3
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&i2s_8ch_0_sdo0
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&i2s_8ch_0_sdo1
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&i2s_8ch_0_sdo2
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&i2s_8ch_0_sdo3
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&i2s_8ch_0_mclk>;
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status = "disabled";
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};
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