/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip Vehicle driver
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*
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* Copyright (C) 2022 Rockchip Electronics Co., Ltd.
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*/
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#ifndef __VEHICLE_CIF_H
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#define __VEHICLE_CIF_H
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#include "vehicle_cfg.h"
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#include "vehicle_cif_regs.h"
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#include "../../../media/platform/rockchip/cif/dev.h"
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#include <linux/dma-mapping.h>
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enum vehicle_rkcif_chip_id {
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CHIP_RK3568_VEHICLE_CIF = 0x0,
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CHIP_RK3588_VEHICLE_CIF,
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CHIP_RK3562_VEHICLE_CIF,
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};
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enum rkcif_csi_host_idx {
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RKCIF_MIPI0_CSI2 = 0x0,
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RKCIF_MIPI1_CSI2,
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RKCIF_MIPI2_CSI2,
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RKCIF_MIPI3_CSI2,
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RKCIF_MIPI4_CSI2,
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RKCIF_MIPI5_CSI2,
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};
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struct vehicle_rkcif_dummy_buffer {
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void *vaddr;
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dma_addr_t dma_addr;
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u32 size;
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};
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struct rk_cif_clk {
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/************clk************/
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struct clk *clks[RKCIF_MAX_BUS_CLK];
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struct clk *xvclk;
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int clks_num;
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/************reset************/
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struct reset_control *cif_rst[RKCIF_MAX_RESET];
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int rsts_num;
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/* spinlock_t lock; */
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bool on;
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};
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struct rk_cif_irqinfo {
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unsigned int irq;
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unsigned long cifirq_idx;
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unsigned long cifirq_normal_idx;
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unsigned long cifirq_abnormal_idx;
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unsigned long dmairq_idx;
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/* @csi_overflow_cnt: count of csi overflow irq
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* @csi_bwidth_lack_cnt: count of csi bandwidth lack irq
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* @dvp_bus_err_cnt: count of dvp bus err irq
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* @dvp_overflow_cnt: count dvp overflow irq
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* @dvp_line_err_cnt: count dvp line err irq
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* @dvp_pix_err_cnt: count dvp pix err irq
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* @all_frm_end_cnt: raw frame end count
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* @all_err_cnt: all err count
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* @
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*/
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u64 csi_overflow_cnt;
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u64 csi_bwidth_lack_cnt;
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u64 dvp_bus_err_cnt;
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u64 dvp_overflow_cnt;
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u64 dvp_line_err_cnt;
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u64 dvp_pix_err_cnt;
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u64 all_frm_end_cnt;
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u64 all_err_cnt;
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u64 dvp_size_err_cnt;
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u64 dvp_bwidth_lack_cnt;
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u64 csi_size_err_cnt;
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};
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#define RKCIF_MAX_CSI_CHANNEL 4
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struct vehicle_csi_channel_info {
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unsigned char id;
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unsigned char enable; /* capture enable */
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unsigned char vc;
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unsigned char data_type;
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unsigned char crop_en;
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unsigned char cmd_mode_en;
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unsigned char fmt_val;
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unsigned int width;
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unsigned int height;
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unsigned int virtual_width;
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unsigned int crop_st_x;
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unsigned int crop_st_y;
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};
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struct vehicle_csi2_err_state_work {
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struct workqueue_struct *err_print_wq;
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struct work_struct work;
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char err_str[CSI_ERRSTR_LEN];
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u32 err_val;
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u32 err_num;
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unsigned long err_stat;
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};
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struct vehicle_cif {
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struct device *dev;
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struct device_node *phy_node;
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struct rk_cif_clk clk;
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struct vehicle_cfg cif_cfg;
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char *base; /*cif base addr*/
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//unsigned long cru_base;
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//unsigned long grf_base;
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void __iomem *cru_base; /*cru base addr*/
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void __iomem *grf_base; /*grf base addr*/
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void __iomem *csi2_dphy_base; /*csi2_dphy base addr*/
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void __iomem *csi2_base; /*csi2 base addr*/
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struct delayed_work work;
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bool is_enabled;
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u32 frame_buf[MAX_BUF_NUM];
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u32 current_buf_index;
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u32 last_buf_index;
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u32 active[2];
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int irq;
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int csi2_irq1;
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int csi2_irq2;
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int drop_frames;
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struct rk_cif_irqinfo irqinfo;
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const struct vehicle_cif_reg *cif_regs;
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struct regmap *regmap_grf;
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struct regmap *regmap_dphy_grf;
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unsigned int frame_idx;
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struct vehicle_rkcif_dummy_buffer dummy_buf;
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struct csi2_dphy_hw *dphy_hw;
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int num_channels;
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int chip_id;
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int inf_id;
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unsigned int csi_host_idx;
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struct vehicle_csi_channel_info channels[RKCIF_MAX_CSI_CHANNEL];
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spinlock_t vbq_lock; /* vfd lock */
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bool interlaced_enable;
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unsigned int interlaced_offset;
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unsigned int interlaced_counts;
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unsigned long *interlaced_buffer;
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atomic_t reset_status;
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wait_queue_head_t wq_stopped;
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bool stopping;
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struct mutex stream_lock;
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enum rkcif_state state;
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struct vehicle_csi2_err_state_work err_state;
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};
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int vehicle_cif_init_mclk(struct vehicle_cif *cif);
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int vehicle_cif_init(struct vehicle_cif *cif);
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int vehicle_cif_deinit(struct vehicle_cif *cif);
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int vehicle_cif_reverse_open(struct vehicle_cfg *v_cfg);
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int vehicle_cif_reverse_close(void);
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int vehicle_wait_cif_reset_done(void);
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/* CIF IRQ STAT*/
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#define DMA_FRAME_END (0x01 << 0)
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#define LINE_END (0x01 << 1)
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#define IFIFO_OF (0x01 << 4)
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#define DFIFO_OF (0x01 << 5)
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#define PRE_INF_FRAME_END (0x01 << 8)
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#define PST_INF_FRAME_END (0x01 << 9)
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enum rk_camera_signal_polarity {
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RK_CAMERA_DEVICE_SIGNAL_HIGH_LEVEL = 1,
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RK_CAMERA_DEVICE_SIGNAL_LOW_LEVEL = 0,
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};
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enum rk_camera_device_type {
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RK_CAMERA_DEVICE_BT601_8 = 0x10000011,
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RK_CAMERA_DEVICE_BT601_10 = 0x10000012,
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RK_CAMERA_DEVICE_BT601_12 = 0x10000014,
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RK_CAMERA_DEVICE_BT601_16 = 0x10000018,
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RK_CAMERA_DEVICE_BT656_8 = 0x10000021,
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RK_CAMERA_DEVICE_BT656_10 = 0x10000022,
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RK_CAMERA_DEVICE_BT656_12 = 0x10000024,
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RK_CAMERA_DEVICE_BT656_16 = 0x10000028,
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RK_CAMERA_DEVICE_CVBS_NTSC = 0x20000001,
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RK_CAMERA_DEVICE_CVBS_PAL = 0x20000002
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};
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#endif
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