/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __RGA_MMU_INFO_H__
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#define __RGA_MMU_INFO_H__
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#include "rga_drv.h"
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/* RGA_IOMMU register offsets */
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#define RGA_IOMMU_BASE 0xf00
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#define RGA_IOMMU_DTE_ADDR (RGA_IOMMU_BASE + 0x00) /* Directory table address */
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#define RGA_IOMMU_STATUS (RGA_IOMMU_BASE + 0x04)
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#define RGA_IOMMU_COMMAND (RGA_IOMMU_BASE + 0x08)
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#define RGA_IOMMU_PAGE_FAULT_ADDR (RGA_IOMMU_BASE + 0x0C) /* IOVA of last page fault */
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#define RGA_IOMMU_ZAP_ONE_LINE (RGA_IOMMU_BASE + 0x10) /* Shootdown one IOTLB entry */
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#define RGA_IOMMU_INT_RAWSTAT (RGA_IOMMU_BASE + 0x14) /* IRQ status ignoring mask */
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#define RGA_IOMMU_INT_CLEAR (RGA_IOMMU_BASE + 0x18) /* Acknowledge and re-arm irq */
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#define RGA_IOMMU_INT_MASK (RGA_IOMMU_BASE + 0x1C) /* IRQ enable */
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#define RGA_IOMMU_INT_STATUS (RGA_IOMMU_BASE + 0x20) /* IRQ status after masking */
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#define RGA_IOMMU_AUTO_GATING (RGA_IOMMU_BASE + 0x24)
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/* RGA_IOMMU_STATUS fields */
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#define RGA_IOMMU_STATUS_PAGING_ENABLED BIT(0)
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#define RGA_IOMMU_STATUS_PAGE_FAULT_ACTIVE BIT(1)
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#define RGA_IOMMU_STATUS_STALL_ACTIVE BIT(2)
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#define RGA_IOMMU_STATUS_IDLE BIT(3)
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#define RGA_IOMMU_STATUS_REPLAY_BUFFER_EMPTY BIT(4)
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#define RGA_IOMMU_STATUS_PAGE_FAULT_IS_WRITE BIT(5)
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#define RGA_IOMMU_STATUS_STALL_NOT_ACTIVE BIT(31)
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/* RGA_IOMMU_COMMAND command values */
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#define RGA_IOMMU_CMD_ENABLE_PAGING 0 /* Enable memory translation */
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#define RGA_IOMMU_CMD_DISABLE_PAGING 1 /* Disable memory translation */
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#define RGA_IOMMU_CMD_ENABLE_STALL 2 /* Stall paging to allow other cmds */
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#define RGA_IOMMU_CMD_DISABLE_STALL 3 /* Stop stall re-enables paging */
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#define RGA_IOMMU_CMD_ZAP_CACHE 4 /* Shoot down entire IOTLB */
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#define RGA_IOMMU_CMD_PAGE_FAULT_DONE 5 /* Clear page fault */
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#define RGA_IOMMU_CMD_FORCE_RESET 6 /* Reset all registers */
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/* RGA_IOMMU_INT_* register fields */
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#define RGA_IOMMU_IRQ_PAGE_FAULT 0x01 /* page fault */
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#define RGA_IOMMU_IRQ_BUS_ERROR 0x02 /* bus read error */
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#define RGA_IOMMU_IRQ_MASK (RGA_IOMMU_IRQ_PAGE_FAULT | RGA_IOMMU_IRQ_BUS_ERROR)
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/*
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* The maximum input is 8192*8192, the maximum output is 4096*4096
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* The size of physical pages requested is:
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* (( maximum_input_value *
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* maximum_input_value * format_bpp ) / 4K_page_size) + 1
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*/
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#define RGA2_PHY_PAGE_SIZE (((8192 * 8192 * 4) / 4096) + 1)
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struct rga_mmu_base {
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unsigned int *buf_virtual;
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struct page **pages;
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u8 buf_order;
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u8 pages_order;
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int32_t front;
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int32_t back;
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int32_t size;
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int32_t curr;
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};
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int rga_user_memory_check(struct page **pages, u32 w, u32 h, u32 format, int flag);
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int rga_set_mmu_base(struct rga_job *job, struct rga2_req *req);
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unsigned int *rga_mmu_buf_get(struct rga_mmu_base *mmu_base, uint32_t size);
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struct rga_mmu_base *rga_mmu_base_init(size_t size);
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void rga_mmu_base_free(struct rga_mmu_base **mmu_base);
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int rga_iommu_detach(struct rga_iommu_info *info);
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int rga_iommu_attach(struct rga_iommu_info *info);
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struct rga_iommu_info *rga_iommu_probe(struct device *dev);
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int rga_iommu_remove(struct rga_iommu_info *info);
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int rga_iommu_bind(void);
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void rga_iommu_unbind(void);
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#endif
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