/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*
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* author:
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* Alpha Lin, alpha.lin@rock-chips.com
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* Randy Li, randy.li@rock-chips.com
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* Ding Wei, leo.ding@rock-chips.com
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*
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*/
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#ifndef __ROCKCHIP_MPP_COMMON_H__
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#define __ROCKCHIP_MPP_COMMON_H__
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#include <linux/cdev.h>
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#include <linux/clk.h>
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#include <linux/dma-buf.h>
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#include <linux/kfifo.h>
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#include <linux/types.h>
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#include <linux/time.h>
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#include <linux/workqueue.h>
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#include <linux/kthread.h>
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#include <linux/reset.h>
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#include <linux/irqreturn.h>
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#include <linux/poll.h>
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#include <linux/platform_device.h>
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#include <soc/rockchip/pm_domains.h>
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#define MHZ (1000 * 1000)
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#define MPP_WORK_TIMEOUT_DELAY (500)
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#define MPP_MAX_MSG_NUM (16)
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#define MPP_MAX_REG_TRANS_NUM (60)
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#define MPP_MAX_TASK_CAPACITY (16)
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/* define flags for mpp_request */
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#define MPP_FLAGS_MULTI_MSG (0x00000001)
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#define MPP_FLAGS_LAST_MSG (0x00000002)
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#define MPP_FLAGS_REG_FD_NO_TRANS (0x00000004)
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#define MPP_FLAGS_SCL_FD_NO_TRANS (0x00000008)
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#define MPP_FLAGS_REG_NO_OFFSET (0x00000010)
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#define MPP_FLAGS_SECURE_MODE (0x00010000)
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/* grf mask for get value */
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#define MPP_GRF_VAL_MASK (0xFFFF)
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/* max 4 cores supported */
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#define MPP_MAX_CORE_NUM (4)
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/**
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* Device type: classified by hardware feature
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*/
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enum MPP_DEVICE_TYPE {
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MPP_DEVICE_VDPU1 = 0, /* 0x00000001 */
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MPP_DEVICE_VDPU2 = 1, /* 0x00000002 */
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MPP_DEVICE_VDPU1_PP = 2, /* 0x00000004 */
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MPP_DEVICE_VDPU2_PP = 3, /* 0x00000008 */
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MPP_DEVICE_AV1DEC = 4, /* 0x00000010 */
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MPP_DEVICE_HEVC_DEC = 8, /* 0x00000100 */
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MPP_DEVICE_RKVDEC = 9, /* 0x00000200 */
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MPP_DEVICE_AVSPLUS_DEC = 12, /* 0x00001000 */
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MPP_DEVICE_RKJPEGD = 13, /* 0x00002000 */
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MPP_DEVICE_RKVENC = 16, /* 0x00010000 */
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MPP_DEVICE_VEPU1 = 17, /* 0x00020000 */
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MPP_DEVICE_VEPU2 = 18, /* 0x00040000 */
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MPP_DEVICE_VEPU2_JPEG = 19, /* 0x00080000 */
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MPP_DEVICE_VEPU22 = 24, /* 0x01000000 */
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MPP_DEVICE_IEP2 = 28, /* 0x10000000 */
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MPP_DEVICE_VDPP = 29, /* 0x20000000 */
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MPP_DEVICE_BUTT,
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};
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/**
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* Driver type: classified by driver
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*/
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enum MPP_DRIVER_TYPE {
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MPP_DRIVER_NULL = 0,
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MPP_DRIVER_VDPU1,
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MPP_DRIVER_VEPU1,
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MPP_DRIVER_VDPU2,
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MPP_DRIVER_VEPU2,
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MPP_DRIVER_VEPU22,
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MPP_DRIVER_RKVDEC,
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MPP_DRIVER_RKVENC,
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MPP_DRIVER_IEP,
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MPP_DRIVER_IEP2,
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MPP_DRIVER_JPGDEC,
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MPP_DRIVER_RKVDEC2,
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MPP_DRIVER_RKVENC2,
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MPP_DRIVER_AV1DEC,
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MPP_DRIVER_VDPP,
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MPP_DRIVER_BUTT,
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};
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/**
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* Command type: keep the same as user space
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*/
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enum MPP_DEV_COMMAND_TYPE {
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MPP_CMD_QUERY_BASE = 0,
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MPP_CMD_QUERY_HW_SUPPORT = MPP_CMD_QUERY_BASE + 0,
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MPP_CMD_QUERY_HW_ID = MPP_CMD_QUERY_BASE + 1,
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MPP_CMD_QUERY_CMD_SUPPORT = MPP_CMD_QUERY_BASE + 2,
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MPP_CMD_QUERY_BUTT,
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MPP_CMD_INIT_BASE = 0x100,
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MPP_CMD_INIT_CLIENT_TYPE = MPP_CMD_INIT_BASE + 0,
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MPP_CMD_INIT_DRIVER_DATA = MPP_CMD_INIT_BASE + 1,
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MPP_CMD_INIT_TRANS_TABLE = MPP_CMD_INIT_BASE + 2,
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MPP_CMD_INIT_BUTT,
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MPP_CMD_SEND_BASE = 0x200,
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MPP_CMD_SET_REG_WRITE = MPP_CMD_SEND_BASE + 0,
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MPP_CMD_SET_REG_READ = MPP_CMD_SEND_BASE + 1,
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MPP_CMD_SET_REG_ADDR_OFFSET = MPP_CMD_SEND_BASE + 2,
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MPP_CMD_SET_RCB_INFO = MPP_CMD_SEND_BASE + 3,
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MPP_CMD_SET_SESSION_FD = MPP_CMD_SEND_BASE + 4,
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MPP_CMD_SEND_BUTT,
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MPP_CMD_POLL_BASE = 0x300,
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MPP_CMD_POLL_HW_FINISH = MPP_CMD_POLL_BASE + 0,
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MPP_CMD_POLL_HW_IRQ = MPP_CMD_POLL_BASE + 1,
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MPP_CMD_POLL_BUTT,
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MPP_CMD_CONTROL_BASE = 0x400,
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MPP_CMD_RESET_SESSION = MPP_CMD_CONTROL_BASE + 0,
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MPP_CMD_TRANS_FD_TO_IOVA = MPP_CMD_CONTROL_BASE + 1,
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MPP_CMD_RELEASE_FD = MPP_CMD_CONTROL_BASE + 2,
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MPP_CMD_SEND_CODEC_INFO = MPP_CMD_CONTROL_BASE + 3,
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MPP_CMD_CONTROL_BUTT,
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MPP_CMD_BUTT,
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};
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enum MPP_CLOCK_MODE {
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CLK_MODE_BASE = 0,
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CLK_MODE_DEFAULT = CLK_MODE_BASE,
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CLK_MODE_DEBUG,
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CLK_MODE_REDUCE,
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CLK_MODE_NORMAL,
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CLK_MODE_ADVANCED,
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CLK_MODE_BUTT,
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};
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enum MPP_RESET_TYPE {
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RST_TYPE_BASE = 0,
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RST_TYPE_A = RST_TYPE_BASE,
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RST_TYPE_H,
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RST_TYPE_NIU_A,
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RST_TYPE_NIU_H,
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RST_TYPE_CORE,
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RST_TYPE_CABAC,
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RST_TYPE_HEVC_CABAC,
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RST_TYPE_BUTT,
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};
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enum ENC_INFO_TYPE {
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ENC_INFO_BASE = 0,
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ENC_INFO_WIDTH,
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ENC_INFO_HEIGHT,
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ENC_INFO_FORMAT,
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ENC_INFO_FPS_IN,
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ENC_INFO_FPS_OUT,
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ENC_INFO_RC_MODE,
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ENC_INFO_BITRATE,
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ENC_INFO_GOP_SIZE,
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ENC_INFO_FPS_CALC,
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ENC_INFO_PROFILE,
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ENC_INFO_BUTT,
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};
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enum DEC_INFO_TYPE {
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DEC_INFO_BASE = 0,
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DEC_INFO_WIDTH,
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DEC_INFO_HEIGHT,
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DEC_INFO_FORMAT,
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DEC_INFO_BITDEPTH,
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DEC_INFO_FPS,
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DEC_INFO_BUTT,
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};
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enum CODEC_INFO_FLAGS {
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CODEC_INFO_FLAG_NULL = 0,
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CODEC_INFO_FLAG_NUMBER,
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CODEC_INFO_FLAG_STRING,
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CODEC_INFO_FLAG_BUTT,
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};
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struct mpp_task;
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struct mpp_session;
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struct mpp_dma_session;
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struct mpp_taskqueue;
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struct iommu_domain;
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/* data common struct for parse out */
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struct mpp_request {
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__u32 cmd;
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__u32 flags;
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__u32 size;
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__u32 offset;
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void __user *data;
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};
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/* struct use to collect task set and poll message */
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struct mpp_task_msgs {
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/* for ioctl msgs bat process */
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struct list_head list;
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struct list_head list_session;
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struct mpp_session *session;
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struct mpp_taskqueue *queue;
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struct mpp_task *task;
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struct mpp_dev *mpp;
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/* for fd reference */
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int ext_fd;
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struct fd f;
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u32 flags;
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u32 req_cnt;
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u32 set_cnt;
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u32 poll_cnt;
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struct mpp_request reqs[MPP_MAX_MSG_NUM];
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struct mpp_request *poll_req;
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};
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struct mpp_grf_info {
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u32 offset;
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u32 val;
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struct regmap *grf;
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};
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/**
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* struct for hardware info
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*/
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struct mpp_hw_info {
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/* register number */
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u32 reg_num;
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/* hardware id */
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int reg_id;
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u32 hw_id;
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/* start index of register */
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u32 reg_start;
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/* end index of register */
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u32 reg_end;
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/* register of enable hardware */
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int reg_en;
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void *link_info;
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};
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struct mpp_trans_info {
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const int count;
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const u16 * const table;
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};
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struct reg_offset_elem {
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u32 index;
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u32 offset;
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};
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struct reg_offset_info {
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u32 cnt;
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struct reg_offset_elem elem[MPP_MAX_REG_TRANS_NUM];
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};
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struct codec_info_elem {
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__u32 type;
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__u32 flag;
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__u64 data;
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};
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struct mpp_clk_info {
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struct clk *clk;
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/* debug rate, from debug */
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u32 debug_rate_hz;
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/* normal rate, from dtsi */
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u32 normal_rate_hz;
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/* high performance rate, from dtsi */
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u32 advanced_rate_hz;
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u32 default_rate_hz;
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u32 reduce_rate_hz;
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/* record last used rate */
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u32 used_rate_hz;
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u32 real_rate_hz;
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};
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struct mpp_dev_var {
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enum MPP_DEVICE_TYPE device_type;
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/* info for each hardware */
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struct mpp_hw_info *hw_info;
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struct mpp_trans_info *trans_info;
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struct mpp_hw_ops *hw_ops;
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struct mpp_dev_ops *dev_ops;
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};
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struct mpp_mem_region {
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struct list_head reg_link;
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/* address for iommu */
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dma_addr_t iova;
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unsigned long len;
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u32 reg_idx;
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void *hdl;
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int fd;
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/* whether is dup import entity */
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bool is_dup;
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};
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struct mpp_dev {
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struct device *dev;
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const struct mpp_dev_var *var;
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struct mpp_hw_ops *hw_ops;
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struct mpp_dev_ops *dev_ops;
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/* per-device work for attached taskqueue */
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struct kthread_work work;
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/* the flag for get/get/reduce freq */
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bool auto_freq_en;
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/* the flag for pmu idle request before device reset */
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bool skip_idle;
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/*
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* The task capacity is the task queue length that hardware can accept.
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* Default 1 means normal hardware can only accept one task at once.
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*/
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u32 task_capacity;
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/*
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* The message capacity is the max message parallel process capacity.
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* Default 1 means normal hardware can only accept one message at one
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* shot ioctl.
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* Multi-core hardware can accept more message at one shot ioctl.
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*/
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u32 msgs_cap;
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int irq;
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bool is_irq_startup;
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u32 irq_status;
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void __iomem *reg_base;
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struct mpp_grf_info *grf_info;
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struct mpp_iommu_info *iommu_info;
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int (*fault_handler)(struct iommu_domain *iommu, struct device *iommu_dev,
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unsigned long iova, int status, void *arg);
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resource_size_t io_base;
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atomic_t reset_request;
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atomic_t session_index;
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atomic_t task_count;
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atomic_t task_index;
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/* current task in running */
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struct mpp_task *cur_task;
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/* set session max buffers */
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u32 session_max_buffers;
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struct mpp_taskqueue *queue;
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struct mpp_reset_group *reset_group;
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/* point to MPP Service */
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struct mpp_service *srv;
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/* multi-core data */
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struct list_head queue_link;
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s32 core_id;
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/* common per-device procfs */
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u32 disable;
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u32 timing_check;
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};
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struct mpp_session {
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enum MPP_DEVICE_TYPE device_type;
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u32 index;
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/* the session related device private data */
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struct mpp_service *srv;
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struct mpp_dev *mpp;
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struct mpp_dma_session *dma;
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/* lock for session task pending list */
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struct mutex pending_lock;
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/* task pending list in session */
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struct list_head pending_list;
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pid_t pid;
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atomic_t task_count;
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atomic_t release_request;
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/* trans info set by user */
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int trans_count;
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u16 trans_table[MPP_MAX_REG_TRANS_NUM];
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u32 msg_flags;
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/* link to mpp_service session_list */
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struct list_head service_link;
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/* link to mpp_workqueue session_attach / session_detach */
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struct list_head session_link;
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/* private data */
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void *priv;
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/*
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* session handler from mpp_dev_ops
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* process_task - handle messages of sending task
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* wait_result - handle messages of polling task
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* deinit - handle session deinit
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*/
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int (*process_task)(struct mpp_session *session,
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struct mpp_task_msgs *msgs);
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int (*wait_result)(struct mpp_session *session,
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struct mpp_task_msgs *msgs);
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void (*deinit)(struct mpp_session *session);
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/* max message count */
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int msgs_cnt;
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struct list_head list_msgs;
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struct list_head list_msgs_idle;
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spinlock_t lock_msgs;
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};
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/* task state in work thread */
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enum mpp_task_state {
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TASK_STATE_PENDING = 0,
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TASK_STATE_RUNNING = 1,
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TASK_STATE_START = 2,
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TASK_STATE_HANDLE = 3,
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TASK_STATE_IRQ = 4,
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TASK_STATE_FINISH = 5,
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TASK_STATE_TIMEOUT = 6,
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TASK_STATE_DONE = 7,
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TASK_STATE_PREPARE = 8,
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TASK_STATE_ABORT = 9,
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TASK_STATE_ABORT_READY = 10,
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TASK_STATE_PROC_DONE = 11,
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/* timing debug state */
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TASK_TIMING_CREATE = 16,
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TASK_TIMING_CREATE_END = 17,
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TASK_TIMING_PENDING = 18,
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TASK_TIMING_RUN = 19,
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TASK_TIMING_TO_SCHED = 20,
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TASK_TIMING_RUN_END = 21,
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TASK_TIMING_IRQ = 22,
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TASK_TIMING_TO_CANCEL = 23,
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TASK_TIMING_ISR = 24,
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TASK_TIMING_FINISH = 25,
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};
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/* The context for the a task */
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struct mpp_task {
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/* context belong to */
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struct mpp_session *session;
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/* link to pending list in session */
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struct list_head pending_link;
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/* link to done list in session */
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struct list_head done_link;
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/* link to list in taskqueue */
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struct list_head queue_link;
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/* The DMA buffer used in this task */
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struct list_head mem_region_list;
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u32 mem_count;
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struct mpp_mem_region mem_regions[MPP_MAX_REG_TRANS_NUM];
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/* state in the taskqueue */
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unsigned long state;
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atomic_t abort_request;
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/* delayed work for hardware timeout */
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struct delayed_work timeout_work;
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struct kref ref;
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/* record context running start time */
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ktime_t start;
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ktime_t part;
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/* debug timing */
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ktime_t on_create;
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ktime_t on_create_end;
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ktime_t on_pending;
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ktime_t on_run;
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ktime_t on_sched_timeout;
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ktime_t on_run_end;
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ktime_t on_irq;
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ktime_t on_cancel_timeout;
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ktime_t on_isr;
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ktime_t on_finish;
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/* hardware info for current task */
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struct mpp_hw_info *hw_info;
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u32 task_index;
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u32 task_id;
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u32 *reg;
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/* event for session wait thread */
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wait_queue_head_t wait;
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/* for multi-core */
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struct mpp_dev *mpp;
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s32 core_id;
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/* hw cycles */
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u32 hw_cycles;
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};
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struct mpp_taskqueue {
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/* kworker for attached taskqueue */
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struct kthread_worker worker;
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/* task for work queue */
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struct task_struct *kworker_task;
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/* lock for session attach and session_detach */
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struct mutex session_lock;
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/* link to session session_link for attached sessions */
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struct list_head session_attach;
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/* link to session session_link for detached sessions */
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struct list_head session_detach;
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atomic_t detach_count;
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atomic_t task_id;
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/* lock for pending list */
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struct mutex pending_lock;
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struct list_head pending_list;
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/* lock for running list */
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spinlock_t running_lock;
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struct list_head running_list;
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/* point to MPP Service */
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struct mpp_service *srv;
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/* lock for mmu list */
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struct mutex mmu_lock;
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struct list_head mmu_list;
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/* lock for dev list */
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struct mutex dev_lock;
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struct list_head dev_list;
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/*
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* task_capacity in taskqueue is the minimum task capacity of the
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* device task capacity which is attached to the taskqueue
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*/
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u32 task_capacity;
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/* multi-core task distribution */
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atomic_t reset_request;
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struct mpp_dev *cores[MPP_MAX_CORE_NUM];
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unsigned long core_idle;
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u32 core_id_max;
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u32 core_count;
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unsigned long dev_active_flags;
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u32 iommu_fault;
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};
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struct mpp_reset_group {
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/* the flag for whether use rw_sem */
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u32 rw_sem_on;
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struct rw_semaphore rw_sem;
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struct reset_control *resets[RST_TYPE_BUTT];
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/* for set rw_sem */
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struct mpp_taskqueue *queue;
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};
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struct mpp_service {
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struct class *cls;
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struct device *dev;
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dev_t dev_id;
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struct cdev mpp_cdev;
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struct device *child_dev;
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#ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
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struct proc_dir_entry *procfs;
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#endif
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unsigned long hw_support;
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atomic_t shutdown_request;
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/* follows for device probe */
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struct mpp_grf_info grf_infos[MPP_DRIVER_BUTT];
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struct platform_driver *sub_drivers[MPP_DRIVER_BUTT];
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/* follows for attach service */
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struct mpp_dev *sub_devices[MPP_DEVICE_BUTT];
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u32 taskqueue_cnt;
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struct mpp_taskqueue *task_queues[MPP_DEVICE_BUTT];
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u32 reset_group_cnt;
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struct mpp_reset_group *reset_groups[MPP_DEVICE_BUTT];
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/* lock for session list */
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struct mutex session_lock;
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struct list_head session_list;
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u32 session_count;
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/* global timing record flag */
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u32 timing_en;
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};
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/*
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* struct mpp_hw_ops - context specific operations for device
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* @init Do something when hardware probe.
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* @exit Do something when hardware remove.
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* @clk_on Enable clocks.
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* @clk_off Disable clocks.
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* @get_freq Get special freq for setting.
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* @set_freq Set freq to hardware.
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* @reduce_freq Reduce freq when hardware is not running.
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* @reset When error, reset hardware.
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*/
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struct mpp_hw_ops {
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int (*init)(struct mpp_dev *mpp);
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int (*exit)(struct mpp_dev *mpp);
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int (*clk_on)(struct mpp_dev *mpp);
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int (*clk_off)(struct mpp_dev *mpp);
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int (*get_freq)(struct mpp_dev *mpp,
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struct mpp_task *mpp_task);
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int (*set_freq)(struct mpp_dev *mpp,
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struct mpp_task *mpp_task);
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int (*reduce_freq)(struct mpp_dev *mpp);
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int (*reset)(struct mpp_dev *mpp);
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int (*set_grf)(struct mpp_dev *mpp);
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};
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/*
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* struct mpp_dev_ops - context specific operations for task
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* @alloc_task Alloc and set task.
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* @prepare Check HW status for determining run next task or not.
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* @run Start a single {en,de}coding run. Set registers to hardware.
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* @irq Deal with hardware interrupt top-half.
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* @isr Deal with hardware interrupt bottom-half.
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* @finish Read back processing results and additional data from hardware.
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* @result Read status to userspace.
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* @free_task Release the resource allocate which alloc.
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* @ioctl Special cammand from userspace.
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* @init_session extra initialization on session init.
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* @free_session extra cleanup on session deinit.
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* @dump_session information dump for session.
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* @dump_dev information dump for hardware device.
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*/
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struct mpp_dev_ops {
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int (*process_task)(struct mpp_session *session,
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struct mpp_task_msgs *msgs);
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int (*wait_result)(struct mpp_session *session,
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struct mpp_task_msgs *msgs);
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void (*deinit)(struct mpp_session *session);
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void (*task_worker)(struct kthread_work *work_s);
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void *(*alloc_task)(struct mpp_session *session,
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struct mpp_task_msgs *msgs);
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void *(*prepare)(struct mpp_dev *mpp, struct mpp_task *task);
|
int (*run)(struct mpp_dev *mpp, struct mpp_task *task);
|
int (*irq)(struct mpp_dev *mpp);
|
int (*isr)(struct mpp_dev *mpp);
|
int (*finish)(struct mpp_dev *mpp, struct mpp_task *task);
|
int (*result)(struct mpp_dev *mpp, struct mpp_task *task,
|
struct mpp_task_msgs *msgs);
|
int (*free_task)(struct mpp_session *session,
|
struct mpp_task *task);
|
int (*ioctl)(struct mpp_session *session, struct mpp_request *req);
|
int (*init_session)(struct mpp_session *session);
|
int (*free_session)(struct mpp_session *session);
|
int (*dump_session)(struct mpp_session *session, struct seq_file *seq);
|
int (*dump_dev)(struct mpp_dev *mpp);
|
};
|
|
struct mpp_taskqueue *mpp_taskqueue_init(struct device *dev);
|
|
struct mpp_mem_region *
|
mpp_task_attach_fd(struct mpp_task *task, int fd);
|
int mpp_translate_reg_address(struct mpp_session *session,
|
struct mpp_task *task, int fmt,
|
u32 *reg, struct reg_offset_info *off_inf);
|
|
int mpp_check_req(struct mpp_request *req, int base,
|
int max_size, u32 off_s, u32 off_e);
|
int mpp_extract_reg_offset_info(struct reg_offset_info *off_inf,
|
struct mpp_request *req);
|
int mpp_query_reg_offset_info(struct reg_offset_info *off_inf,
|
u32 index);
|
int mpp_translate_reg_offset_info(struct mpp_task *task,
|
struct reg_offset_info *off_inf,
|
u32 *reg);
|
int mpp_task_init(struct mpp_session *session,
|
struct mpp_task *task);
|
int mpp_task_finish(struct mpp_session *session,
|
struct mpp_task *task);
|
void mpp_task_run_begin(struct mpp_task *task, u32 timing_en, u32 timeout);
|
void mpp_task_run_end(struct mpp_task *task, u32 timing_en);
|
int mpp_task_finalize(struct mpp_session *session,
|
struct mpp_task *task);
|
int mpp_task_dump_mem_region(struct mpp_dev *mpp,
|
struct mpp_task *task);
|
int mpp_task_dump_reg(struct mpp_dev *mpp,
|
struct mpp_task *task);
|
int mpp_task_dump_hw_reg(struct mpp_dev *mpp);
|
void mpp_task_dump_timing(struct mpp_task *task, s64 time_diff);
|
|
void mpp_reg_show(struct mpp_dev *mpp, u32 offset);
|
void mpp_reg_show_range(struct mpp_dev *mpp, u32 start, u32 end);
|
void mpp_free_task(struct kref *ref);
|
|
void mpp_session_deinit(struct mpp_session *session);
|
void mpp_session_cleanup_detach(struct mpp_taskqueue *queue,
|
struct kthread_work *work);
|
|
int mpp_taskqueue_pending_to_run(struct mpp_taskqueue *queue, struct mpp_task *task);
|
|
int mpp_dev_probe(struct mpp_dev *mpp,
|
struct platform_device *pdev);
|
int mpp_dev_remove(struct mpp_dev *mpp);
|
void mpp_dev_shutdown(struct platform_device *pdev);
|
int mpp_dev_register_srv(struct mpp_dev *mpp, struct mpp_service *srv);
|
|
int mpp_power_on(struct mpp_dev *mpp);
|
int mpp_power_off(struct mpp_dev *mpp);
|
int mpp_dev_reset(struct mpp_dev *mpp);
|
|
irqreturn_t mpp_dev_irq(int irq, void *param);
|
irqreturn_t mpp_dev_isr_sched(int irq, void *param);
|
|
struct reset_control *mpp_reset_control_get(struct mpp_dev *mpp,
|
enum MPP_RESET_TYPE type,
|
const char *name);
|
|
u32 mpp_get_grf(struct mpp_grf_info *grf_info);
|
bool mpp_grf_is_changed(struct mpp_grf_info *grf_info);
|
int mpp_set_grf(struct mpp_grf_info *grf_info);
|
|
int mpp_time_record(struct mpp_task *task);
|
int mpp_time_diff(struct mpp_task *task);
|
int mpp_time_diff_with_hw_time(struct mpp_task *task, u32 clk_hz);
|
int mpp_time_part_diff(struct mpp_task *task);
|
|
int mpp_write_req(struct mpp_dev *mpp, u32 *regs,
|
u32 start_idx, u32 end_idx, u32 en_idx);
|
int mpp_read_req(struct mpp_dev *mpp, u32 *regs,
|
u32 start_idx, u32 end_idx);
|
|
int mpp_get_clk_info(struct mpp_dev *mpp,
|
struct mpp_clk_info *clk_info,
|
const char *name);
|
int mpp_set_clk_info_rate_hz(struct mpp_clk_info *clk_info,
|
enum MPP_CLOCK_MODE mode,
|
unsigned long val);
|
unsigned long mpp_get_clk_info_rate_hz(struct mpp_clk_info *clk_info,
|
enum MPP_CLOCK_MODE mode);
|
int mpp_clk_set_rate(struct mpp_clk_info *clk_info,
|
enum MPP_CLOCK_MODE mode);
|
|
static inline int mpp_write(struct mpp_dev *mpp, u32 reg, u32 val)
|
{
|
int idx = reg / sizeof(u32);
|
|
mpp_debug(DEBUG_SET_REG,
|
"write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
|
writel(val, mpp->reg_base + reg);
|
|
return 0;
|
}
|
|
static inline int mpp_write_relaxed(struct mpp_dev *mpp, u32 reg, u32 val)
|
{
|
int idx = reg / sizeof(u32);
|
|
mpp_debug(DEBUG_SET_REG,
|
"write reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
|
writel_relaxed(val, mpp->reg_base + reg);
|
|
return 0;
|
}
|
|
static inline u32 mpp_read(struct mpp_dev *mpp, u32 reg)
|
{
|
u32 val = 0;
|
int idx = reg / sizeof(u32);
|
|
val = readl(mpp->reg_base + reg);
|
mpp_debug(DEBUG_GET_REG,
|
"read reg[%03d]: %04x: 0x%08x\n", idx, reg, val);
|
|
return val;
|
}
|
|
static inline u32 mpp_read_relaxed(struct mpp_dev *mpp, u32 reg)
|
{
|
u32 val = 0;
|
int idx = reg / sizeof(u32);
|
|
val = readl_relaxed(mpp->reg_base + reg);
|
mpp_debug(DEBUG_GET_REG,
|
"read reg[%03d] %04x: 0x%08x\n", idx, reg, val);
|
|
return val;
|
}
|
|
static inline int mpp_safe_reset(struct reset_control *rst)
|
{
|
if (rst)
|
reset_control_assert(rst);
|
|
return 0;
|
}
|
|
static inline int mpp_safe_unreset(struct reset_control *rst)
|
{
|
if (rst)
|
reset_control_deassert(rst);
|
|
return 0;
|
}
|
|
static inline int mpp_clk_safe_enable(struct clk *clk)
|
{
|
if (clk)
|
clk_prepare_enable(clk);
|
|
return 0;
|
}
|
|
static inline int mpp_clk_safe_disable(struct clk *clk)
|
{
|
if (clk)
|
clk_disable_unprepare(clk);
|
|
return 0;
|
}
|
|
static inline int mpp_reset_down_read(struct mpp_reset_group *group)
|
{
|
if (group && group->rw_sem_on)
|
down_read(&group->rw_sem);
|
|
return 0;
|
}
|
|
static inline int mpp_reset_up_read(struct mpp_reset_group *group)
|
{
|
if (group && group->rw_sem_on)
|
up_read(&group->rw_sem);
|
|
return 0;
|
}
|
|
static inline int mpp_reset_down_write(struct mpp_reset_group *group)
|
{
|
if (group && group->rw_sem_on)
|
down_write(&group->rw_sem);
|
|
return 0;
|
}
|
|
static inline int mpp_reset_up_write(struct mpp_reset_group *group)
|
{
|
if (group && group->rw_sem_on)
|
up_write(&group->rw_sem);
|
|
return 0;
|
}
|
|
static inline int mpp_pmu_idle_request(struct mpp_dev *mpp, bool idle)
|
{
|
if (mpp->skip_idle)
|
return 0;
|
|
return rockchip_pmu_idle_request(mpp->dev, idle);
|
}
|
|
static inline struct mpp_dev *
|
mpp_get_task_used_device(const struct mpp_task *task,
|
const struct mpp_session *session)
|
{
|
return task->mpp ? task->mpp : session->mpp;
|
}
|
|
#ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
|
struct proc_dir_entry *
|
mpp_procfs_create_u32(const char *name, umode_t mode,
|
struct proc_dir_entry *parent, void *data);
|
void mpp_procfs_create_common(struct proc_dir_entry *parent, struct mpp_dev *mpp);
|
#else
|
static inline struct proc_dir_entry *
|
mpp_procfs_create_u32(const char *name, umode_t mode,
|
struct proc_dir_entry *parent, void *data)
|
{
|
return 0;
|
}
|
void mpp_procfs_create_common(struct proc_dir_entry *parent, struct mpp_dev *mpp)
|
{
|
}
|
#endif
|
|
#ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
|
extern const char *mpp_device_name[MPP_DEVICE_BUTT];
|
extern const char *enc_info_item_name[ENC_INFO_BUTT];
|
#endif
|
|
extern const struct file_operations rockchip_mpp_fops;
|
|
extern struct platform_driver rockchip_rkvdec_driver;
|
extern struct platform_driver rockchip_rkvenc_driver;
|
extern struct platform_driver rockchip_vdpu1_driver;
|
extern struct platform_driver rockchip_vepu1_driver;
|
extern struct platform_driver rockchip_vdpu2_driver;
|
extern struct platform_driver rockchip_vepu2_driver;
|
extern struct platform_driver rockchip_vepu22_driver;
|
extern struct platform_driver rockchip_iep2_driver;
|
extern struct platform_driver rockchip_jpgdec_driver;
|
extern struct platform_driver rockchip_rkvdec2_driver;
|
extern struct platform_driver rockchip_rkvenc2_driver;
|
extern struct platform_driver rockchip_av1dec_driver;
|
extern struct platform_driver rockchip_av1_iommu_driver;
|
|
extern int av1dec_driver_register(struct platform_driver *drv);
|
extern void av1dec_driver_unregister(struct platform_driver *drv);
|
extern struct bus_type av1dec_bus;
|
extern struct platform_driver rockchip_vdpp_driver;
|
|
#endif
|
