/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018 Intel Corporation */
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#ifndef __IPU3_CSS_H
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#define __IPU3_CSS_H
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#include <linux/videodev2.h>
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#include <linux/types.h>
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#include "ipu3-abi.h"
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#include "ipu3-css-pool.h"
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/* 2 stages for split isp pipeline, 1 for scaling */
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#define IMGU_NUM_SP 2
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#define IMGU_MAX_PIPELINE_NUM 20
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#define IMGU_MAX_PIPE_NUM 2
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/* For DVS etc., format FRAME_FMT_YUV420_16 */
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#define IPU3_CSS_AUX_FRAME_REF 0
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/* For temporal noise reduction DVS etc., format FRAME_FMT_YUV_LINE */
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#define IPU3_CSS_AUX_FRAME_TNR 1
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#define IPU3_CSS_AUX_FRAME_TYPES 2 /* REF and TNR */
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#define IPU3_CSS_AUX_FRAMES 2 /* 2 for REF and 2 for TNR */
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#define IPU3_CSS_QUEUE_IN 0
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#define IPU3_CSS_QUEUE_PARAMS 1
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#define IPU3_CSS_QUEUE_OUT 2
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#define IPU3_CSS_QUEUE_VF 3
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#define IPU3_CSS_QUEUE_STAT_3A 4
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#define IPU3_CSS_QUEUES 5
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#define IPU3_CSS_RECT_EFFECTIVE 0 /* Effective resolution */
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#define IPU3_CSS_RECT_BDS 1 /* Resolution after BDS */
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#define IPU3_CSS_RECT_ENVELOPE 2 /* DVS envelope size */
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#define IPU3_CSS_RECT_GDC 3 /* gdc output res */
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#define IPU3_CSS_RECTS 4 /* number of rects */
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#define IA_CSS_BINARY_MODE_PRIMARY 2
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#define IA_CSS_BINARY_MODE_VIDEO 3
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#define IPU3_CSS_DEFAULT_BINARY 3 /* default binary index */
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/*
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* The pipe id type, distinguishes the kind of pipes that
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* can be run in parallel.
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*/
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enum imgu_css_pipe_id {
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IPU3_CSS_PIPE_ID_PREVIEW,
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IPU3_CSS_PIPE_ID_COPY,
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IPU3_CSS_PIPE_ID_VIDEO,
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IPU3_CSS_PIPE_ID_CAPTURE,
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IPU3_CSS_PIPE_ID_YUVPP,
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IPU3_CSS_PIPE_ID_ACC,
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IPU3_CSS_PIPE_ID_NUM
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};
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struct imgu_css_resolution {
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u32 w;
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u32 h;
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};
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enum imgu_css_buffer_state {
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IPU3_CSS_BUFFER_NEW, /* Not yet queued */
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IPU3_CSS_BUFFER_QUEUED, /* Queued, waiting to be filled */
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IPU3_CSS_BUFFER_DONE, /* Finished processing, removed from queue */
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IPU3_CSS_BUFFER_FAILED, /* Was not processed, removed from queue */
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};
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struct imgu_css_buffer {
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/* Private fields: user doesn't touch */
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dma_addr_t daddr;
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unsigned int queue;
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enum imgu_css_buffer_state state;
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struct list_head list;
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u8 queue_pos;
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unsigned int pipe;
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};
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struct imgu_css_format {
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u32 pixelformat;
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enum v4l2_colorspace colorspace;
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enum imgu_abi_frame_format frame_format;
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enum imgu_abi_bayer_order bayer_order;
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enum imgu_abi_osys_format osys_format;
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enum imgu_abi_osys_tiling osys_tiling;
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u32 bytesperpixel_num; /* Bytes per pixel in first plane * 50 */
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u8 bit_depth; /* Effective bits per pixel */
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u8 chroma_decim; /* Chroma plane decimation, 0=no chroma plane */
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u8 width_align; /* Alignment requirement for width_pad */
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u8 flags;
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};
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struct imgu_css_queue {
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union {
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struct v4l2_pix_format_mplane mpix;
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struct v4l2_meta_format meta;
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} fmt;
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const struct imgu_css_format *css_fmt;
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unsigned int width_pad;
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struct list_head bufs;
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};
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struct imgu_css_pipe {
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enum imgu_css_pipe_id pipe_id;
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unsigned int bindex;
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struct imgu_css_queue queue[IPU3_CSS_QUEUES];
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struct v4l2_rect rect[IPU3_CSS_RECTS];
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bool vf_output_en;
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/* Protect access to queue[IPU3_CSS_QUEUES] */
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spinlock_t qlock;
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/* Data structures shared with IMGU and driver, always allocated */
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struct imgu_css_map sp_ddr_ptrs;
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struct imgu_css_map xmem_sp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
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[IMGU_ABI_MAX_STAGES];
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struct imgu_css_map xmem_isp_stage_ptrs[IPU3_CSS_PIPE_ID_NUM]
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[IMGU_ABI_MAX_STAGES];
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/*
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* Data structures shared with IMGU and driver, binary specific.
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* PARAM_CLASS_CONFIG and PARAM_CLASS_STATE parameters.
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*/
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struct imgu_css_map binary_params_cs[IMGU_ABI_PARAM_CLASS_NUM - 1]
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[IMGU_ABI_NUM_MEMORIES];
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struct {
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struct imgu_css_map mem[IPU3_CSS_AUX_FRAMES];
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unsigned int width;
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unsigned int height;
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unsigned int bytesperline;
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unsigned int bytesperpixel;
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} aux_frames[IPU3_CSS_AUX_FRAME_TYPES];
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struct {
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struct imgu_css_pool parameter_set_info;
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struct imgu_css_pool acc;
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struct imgu_css_pool gdc;
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struct imgu_css_pool obgrid;
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/* PARAM_CLASS_PARAM parameters for binding while streaming */
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struct imgu_css_pool binary_params_p[IMGU_ABI_NUM_MEMORIES];
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} pool;
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struct imgu_css_map abi_buffers[IPU3_CSS_QUEUES]
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[IMGU_ABI_HOST2SP_BUFQ_SIZE];
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};
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/* IPU3 Camera Sub System structure */
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struct imgu_css {
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struct device *dev;
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void __iomem *base;
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const struct firmware *fw;
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struct imgu_fw_header *fwp;
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int iomem_length;
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int fw_bl, fw_sp[IMGU_NUM_SP]; /* Indices of bl and SP binaries */
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struct imgu_css_map *binary; /* fw binaries mapped to device */
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bool streaming; /* true when streaming is enabled */
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struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM];
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struct imgu_css_map xmem_sp_group_ptrs;
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/* enabled pipe(s) */
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DECLARE_BITMAP(enabled_pipes, IMGU_MAX_PIPE_NUM);
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};
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/******************* css v4l *******************/
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int imgu_css_init(struct device *dev, struct imgu_css *css,
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void __iomem *base, int length);
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void imgu_css_cleanup(struct imgu_css *css);
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int imgu_css_fmt_try(struct imgu_css *css,
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struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
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struct v4l2_rect *rects[IPU3_CSS_RECTS],
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unsigned int pipe);
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int imgu_css_fmt_set(struct imgu_css *css,
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struct v4l2_pix_format_mplane *fmts[IPU3_CSS_QUEUES],
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struct v4l2_rect *rects[IPU3_CSS_RECTS],
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unsigned int pipe);
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int imgu_css_meta_fmt_set(struct v4l2_meta_format *fmt);
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int imgu_css_buf_queue(struct imgu_css *css, unsigned int pipe,
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struct imgu_css_buffer *b);
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struct imgu_css_buffer *imgu_css_buf_dequeue(struct imgu_css *css);
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int imgu_css_start_streaming(struct imgu_css *css);
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void imgu_css_stop_streaming(struct imgu_css *css);
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bool imgu_css_queue_empty(struct imgu_css *css);
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bool imgu_css_is_streaming(struct imgu_css *css);
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bool imgu_css_pipe_queue_empty(struct imgu_css *css, unsigned int pipe);
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/******************* css hw *******************/
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int imgu_css_set_powerup(struct device *dev, void __iomem *base,
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unsigned int freq);
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void imgu_css_set_powerdown(struct device *dev, void __iomem *base);
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int imgu_css_irq_ack(struct imgu_css *css);
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/******************* set parameters ************/
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int imgu_css_set_parameters(struct imgu_css *css, unsigned int pipe,
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struct ipu3_uapi_params *set_params);
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/******************* auxiliary helpers *******************/
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static inline enum imgu_css_buffer_state
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imgu_css_buf_state(struct imgu_css_buffer *b)
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{
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return b->state;
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}
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/* Initialize given buffer. May be called several times. */
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static inline void imgu_css_buf_init(struct imgu_css_buffer *b,
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unsigned int queue, dma_addr_t daddr)
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{
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b->state = IPU3_CSS_BUFFER_NEW;
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b->queue = queue;
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b->daddr = daddr;
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}
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#endif
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