/*
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* Copyright (C) 2017 Rockchip Electronics Co. Ltd.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/crc32.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <asm/system_info.h>
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#include <linux/rockchip/cpu.h>
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unsigned long rockchip_soc_id;
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EXPORT_SYMBOL(rockchip_soc_id);
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static int rockchip_cpuinfo_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct nvmem_cell *cell;
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unsigned char *efuse_buf, buf[16];
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size_t len = 0;
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int i;
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cell = nvmem_cell_get(dev, "cpu-code");
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if (!IS_ERR(cell)) {
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efuse_buf = nvmem_cell_read(cell, &len);
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nvmem_cell_put(cell);
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if (IS_ERR(efuse_buf))
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return PTR_ERR(efuse_buf);
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if (len == 2)
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rockchip_set_cpu((efuse_buf[0] << 8 | efuse_buf[1]));
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kfree(efuse_buf);
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}
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cell = nvmem_cell_get(dev, "cpu-version");
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if (!IS_ERR(cell)) {
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efuse_buf = nvmem_cell_read(cell, &len);
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nvmem_cell_put(cell);
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if (IS_ERR(efuse_buf))
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return PTR_ERR(efuse_buf);
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if ((len == 1) && (efuse_buf[0] > rockchip_get_cpu_version()))
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rockchip_set_cpu_version(efuse_buf[0]);
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kfree(efuse_buf);
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}
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cell = nvmem_cell_get(dev, "id");
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if (IS_ERR(cell)) {
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dev_err(dev, "failed to get id cell: %ld\n", PTR_ERR(cell));
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if (PTR_ERR(cell) == -EPROBE_DEFER)
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return PTR_ERR(cell);
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return PTR_ERR(cell);
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}
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efuse_buf = nvmem_cell_read(cell, &len);
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nvmem_cell_put(cell);
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if (IS_ERR(efuse_buf))
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return PTR_ERR(efuse_buf);
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if (len != 16) {
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kfree(efuse_buf);
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dev_err(dev, "invalid id len: %zu\n", len);
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return -EINVAL;
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}
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for (i = 0; i < 8; i++) {
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buf[i] = efuse_buf[1 + (i << 1)];
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buf[i + 8] = efuse_buf[i << 1];
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}
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kfree(efuse_buf);
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dev_info(dev, "SoC\t\t: %lx\n", rockchip_soc_id);
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#ifdef CONFIG_NO_GKI
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system_serial_low = crc32(0, buf, 8);
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system_serial_high = crc32(system_serial_low, buf + 8, 8);
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dev_info(dev, "Serial\t\t: %08x%08x\n",
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system_serial_high, system_serial_low);
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#endif
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return 0;
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}
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static const struct of_device_id rockchip_cpuinfo_of_match[] = {
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{ .compatible = "rockchip,cpuinfo", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, rockchip_cpuinfo_of_match);
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static struct platform_driver rockchip_cpuinfo_driver = {
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.probe = rockchip_cpuinfo_probe,
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.driver = {
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.name = "rockchip-cpuinfo",
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.of_match_table = rockchip_cpuinfo_of_match,
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},
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};
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static void rockchip_set_cpu_version_from_os_reg(u32 reg)
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{
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void __iomem *r = ioremap(reg, 0x4);
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if (r) {
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rockchip_set_cpu_version(readl_relaxed(r) & GENMASK(2, 0));
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iounmap(r);
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}
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}
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static void px30_init(void)
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{
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void __iomem *base;
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rockchip_soc_id = ROCKCHIP_SOC_PX30;
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#define PX30_DDR_GRF_BASE 0xFF630000
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#define PX30_DDR_GRF_CON1 0x04
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base = ioremap(PX30_DDR_GRF_BASE, SZ_4K);
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if (base) {
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unsigned int val = readl_relaxed(base + PX30_DDR_GRF_CON1);
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if (((val >> 14) & 0x03) == 0x03)
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rockchip_soc_id = ROCKCHIP_SOC_PX30S;
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iounmap(base);
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}
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}
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#define RV1106_OS_REG1 0xff020204
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static void rv1103_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RV1103;
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rockchip_set_cpu_version_from_os_reg(RV1106_OS_REG1);
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}
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static void rv1106_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RV1106;
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rockchip_set_cpu_version_from_os_reg(RV1106_OS_REG1);
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}
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static void rv1109_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RV1109;
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}
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static void rv1126_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RV1126;
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}
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static void rk3288_init(void)
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{
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void __iomem *base;
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rockchip_soc_id = ROCKCHIP_SOC_RK3288;
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#define RK3288_HDMI_PHYS 0xFF980000
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base = ioremap(RK3288_HDMI_PHYS, SZ_4K);
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if (base) {
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/* RK3288W HDMI Revision ID is 0x1A */
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if (readl_relaxed(base + 4) == 0x1A)
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rockchip_soc_id = ROCKCHIP_SOC_RK3288W;
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iounmap(base);
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}
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}
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static void rk3126_init(void)
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{
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void __iomem *base;
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rockchip_soc_id = ROCKCHIP_SOC_RK3126;
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#define RK312X_GRF_PHYS 0x20008000
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#define RK312X_GRF_SOC_CON1 0x00000144
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#define RK312X_GRF_CHIP_TAG 0x00000300
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base = ioremap(RK312X_GRF_PHYS, SZ_4K);
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if (base) {
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if (readl_relaxed(base + RK312X_GRF_CHIP_TAG) == 0x3136) {
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if (readl_relaxed(base + RK312X_GRF_SOC_CON1) & 0x1)
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rockchip_soc_id = ROCKCHIP_SOC_RK3126C;
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else
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rockchip_soc_id = ROCKCHIP_SOC_RK3126B;
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}
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iounmap(base);
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}
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}
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static void rk3308_init(void)
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{
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void __iomem *base;
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rockchip_soc_id = ROCKCHIP_SOC_RK3308;
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#define RK3308_GRF_PHYS 0xFF000000
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#define RK3308_GRF_CHIP_ID 0x800
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base = ioremap(RK3308_GRF_PHYS, SZ_4K);
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if (base) {
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u32 v = readl_relaxed(base + RK3308_GRF_CHIP_ID);
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if (v == 0x3308)
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rockchip_soc_id = ROCKCHIP_SOC_RK3308B;
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if (v == 0x3308c)
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rockchip_soc_id = ROCKCHIP_SOC_RK3308BS;
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iounmap(base);
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}
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}
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static void rk3528_init(void)
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{
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if (of_machine_is_compatible("rockchip,rk3528"))
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rockchip_soc_id = ROCKCHIP_SOC_RK3528;
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else if (of_machine_is_compatible("rockchip,rk3528a"))
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rockchip_soc_id = ROCKCHIP_SOC_RK3528A;
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}
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#define RK356X_PMU_GRF_PHYS 0xfdc20000
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#define RK356X_PMU_GRF_SOC_CON0 0x00000100
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#define RK356X_CHIP_VERSION_MASK 0x00008000
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static void rk356x_set_cpu_version(void)
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{
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void __iomem *base;
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base = ioremap(RK356X_PMU_GRF_PHYS, SZ_4K);
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if (base) {
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if (readl_relaxed(base + RK356X_PMU_GRF_SOC_CON0) & RK356X_CHIP_VERSION_MASK)
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rockchip_set_cpu_version(1);
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iounmap(base);
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}
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}
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static void rk3566_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RK3566;
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rk356x_set_cpu_version();
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}
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static void rk3567_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RK3567;
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rk356x_set_cpu_version();
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}
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static void rk3568_init(void)
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{
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rockchip_soc_id = ROCKCHIP_SOC_RK3568;
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rk356x_set_cpu_version();
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}
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int rockchip_soc_id_init(void)
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{
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if (rockchip_soc_id)
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return 0;
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if (cpu_is_rk3288()) {
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rk3288_init();
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} else if (cpu_is_rk312x()) {
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if (of_machine_is_compatible("rockchip,rk3128"))
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rockchip_soc_id = ROCKCHIP_SOC_RK3128;
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else
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rk3126_init();
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} else if (cpu_is_rk3308()) {
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rk3308_init();
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} else if (cpu_is_rv1103()) {
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rv1103_init();
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} else if (cpu_is_rv1106()) {
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rv1106_init();
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} else if (cpu_is_rv1109()) {
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rv1109_init();
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} else if (cpu_is_rv1126()) {
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rv1126_init();
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} else if (cpu_is_rk3528()) {
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rk3528_init();
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} else if (cpu_is_rk3566()) {
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rk3566_init();
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} else if (cpu_is_rk3567()) {
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rk3567_init();
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} else if (cpu_is_rk3568()) {
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rk3568_init();
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} else if (cpu_is_px30()) {
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px30_init();
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}
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return 0;
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}
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EXPORT_SYMBOL(rockchip_soc_id_init);
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#ifndef MODULE
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pure_initcall(rockchip_soc_id_init);
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#endif
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static int __init rockchip_cpuinfo_init(void)
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{
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#ifdef MODULE
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rockchip_soc_id_init();
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#endif
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return platform_driver_register(&rockchip_cpuinfo_driver);
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}
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subsys_initcall_sync(rockchip_cpuinfo_init);
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static void __exit rockchip_cpuinfo_exit(void)
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{
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platform_driver_unregister(&rockchip_cpuinfo_driver);
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}
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module_exit(rockchip_cpuinfo_exit);
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MODULE_LICENSE("GPL");
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