// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2021 Rockchip Electronics Co. Ltd.
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*
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* Author: Wyon Bi <bivvy.bi@rock-chips.com>
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*/
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#include "rk628.h"
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#include "rk628_config.h"
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#include "rk628_cru.h"
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static void calc_dsp_frm_hst_vst(const struct rk628_display_mode *src,
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const struct rk628_display_mode *dst,
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u32 *dsp_frame_hst,
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u32 *dsp_frame_vst)
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{
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u32 bp_in, bp_out;
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u32 v_scale_ratio;
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u64 t_frm_st;
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u64 t_bp_in, t_bp_out, t_delta, tin;
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u32 src_pixclock, dst_pixclock;
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u32 dst_htotal, dst_hsync_len, dst_hback_porch;
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u32 dst_vsync_len, dst_vback_porch, dst_vactive;
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u32 src_htotal, src_hsync_len, src_hback_porch;
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u32 src_vtotal, src_vsync_len, src_vback_porch, src_vactive;
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u32 rem;
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u32 x;
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src_pixclock = div_u64(1000000000llu, src->clock);
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dst_pixclock = div_u64(1000000000llu, dst->clock);
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src_hsync_len = src->hsync_end - src->hsync_start;
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src_hback_porch = src->htotal - src->hsync_end;
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src_htotal = src->htotal;
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src_vsync_len = src->vsync_end - src->vsync_start;
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src_vback_porch = src->vtotal - src->vsync_end;
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src_vactive = src->vdisplay;
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src_vtotal = src->vtotal;
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dst_hsync_len = dst->hsync_end - dst->hsync_start;
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dst_hback_porch = dst->htotal - dst->hsync_end;
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dst_htotal = dst->htotal;
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dst_vsync_len = dst->vsync_end - dst->vsync_start;
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dst_vback_porch = dst->vtotal - dst->vsync_end;
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dst_vactive = dst->vdisplay;
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bp_in = (src_vback_porch + src_vsync_len) * src_htotal +
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src_hsync_len + src_hback_porch;
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bp_out = (dst_vback_porch + dst_vsync_len) * dst_htotal +
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dst_hsync_len + dst_hback_porch;
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t_bp_in = bp_in * src_pixclock;
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t_bp_out = bp_out * dst_pixclock;
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tin = src_vtotal * src_htotal * src_pixclock;
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v_scale_ratio = src_vactive / dst_vactive;
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x = 5;
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__retry:
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if (v_scale_ratio <= 2)
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t_delta = x * src_htotal * src_pixclock;
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else
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t_delta = 12 * src_htotal * src_pixclock;
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if (t_bp_in + t_delta > t_bp_out)
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t_frm_st = (t_bp_in + t_delta - t_bp_out);
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else
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t_frm_st = tin - (t_bp_out - (t_bp_in + t_delta));
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do_div(t_frm_st, src_pixclock);
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rem = do_div(t_frm_st, src_htotal);
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if ((t_frm_st < 2 || t_frm_st > 14) && x < 12) {
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x++;
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goto __retry;
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}
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if (t_frm_st < 2 || t_frm_st > 14)
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t_frm_st = 4;
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*dsp_frame_hst = rem;
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*dsp_frame_vst = t_frm_st;
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}
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static void rk628_post_process_scaler_init(struct rk628 *rk628,
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struct rk628_display_mode *src,
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const struct rk628_display_mode *dst)
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{
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u32 dsp_frame_hst, dsp_frame_vst;
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u32 scl_hor_mode, scl_ver_mode;
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u32 scl_v_factor, scl_h_factor;
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u32 dsp_htotal, dsp_hs_end, dsp_hact_st, dsp_hact_end;
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u32 dsp_vtotal, dsp_vs_end, dsp_vact_st, dsp_vact_end;
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u32 dsp_hbor_end, dsp_hbor_st, dsp_vbor_end, dsp_vbor_st;
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u16 bor_right = 0, bor_left = 0, bor_up = 0, bor_down = 0;
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u8 hor_down_mode = 0, ver_down_mode = 0;
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u32 dst_hsync_len, dst_hback_porch, dst_hfront_porch, dst_hactive;
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u32 dst_vsync_len, dst_vback_porch, dst_vfront_porch, dst_vactive;
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u32 src_hactive;
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u32 src_vactive;
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src_hactive = src->hdisplay;
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src_vactive = src->vdisplay;
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dst_hactive = dst->hdisplay;
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dst_hsync_len = dst->hsync_end - dst->hsync_start;
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dst_hback_porch = dst->htotal - dst->hsync_end;
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dst_hfront_porch = dst->hsync_start - dst->hdisplay;
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dst_vsync_len = dst->vsync_end - dst->vsync_start;
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dst_vback_porch = dst->vtotal - dst->vsync_end;
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dst_vfront_porch = dst->vsync_start - dst->vdisplay;
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dst_vactive = dst->vdisplay;
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dsp_htotal = dst_hsync_len + dst_hback_porch +
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dst_hactive + dst_hfront_porch;
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dsp_vtotal = dst_vsync_len + dst_vback_porch +
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dst_vactive + dst_vfront_porch;
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dsp_hs_end = dst_hsync_len;
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dsp_vs_end = dst_vsync_len;
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dsp_hbor_end = dst_hsync_len + dst_hback_porch + dst_hactive;
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dsp_hbor_st = dst_hsync_len + dst_hback_porch;
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dsp_vbor_end = dst_vsync_len + dst_vback_porch + dst_vactive;
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dsp_vbor_st = dst_vsync_len + dst_vback_porch;
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dsp_hact_st = dsp_hbor_st + bor_left;
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dsp_hact_end = dsp_hbor_end - bor_right;
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dsp_vact_st = dsp_vbor_st + bor_up;
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dsp_vact_end = dsp_vbor_end - bor_down;
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calc_dsp_frm_hst_vst(src, dst, &dsp_frame_hst, &dsp_frame_vst);
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dev_info(rk628->dev, "dsp_frame_vst:%d dsp_frame_hst:%d\n",
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dsp_frame_vst, dsp_frame_hst);
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if (src_hactive > dst_hactive) {
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scl_hor_mode = 2;
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if (hor_down_mode == 0) {
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if ((src_hactive - 1) / (dst_hactive - 1) > 2)
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scl_h_factor = ((src_hactive - 1) << 14) /
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(dst_hactive - 1);
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else
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scl_h_factor = ((src_hactive - 2) << 14) /
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(dst_hactive - 1);
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} else {
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scl_h_factor = (dst_hactive << 16) / (src_hactive - 1);
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}
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} else if (src_hactive == dst_hactive) {
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scl_hor_mode = 0;
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scl_h_factor = 0;
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} else {
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scl_hor_mode = 1;
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scl_h_factor = ((src_hactive - 1) << 16) / (dst_hactive - 1);
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}
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if (src_vactive > dst_vactive) {
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scl_ver_mode = 2;
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if (ver_down_mode == 0) {
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if ((src_vactive - 1) / (dst_vactive - 1) > 2)
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scl_v_factor = ((src_vactive - 1) << 14) /
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(dst_vactive - 1);
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else
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scl_v_factor = ((src_vactive - 2) << 14) /
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(dst_vactive - 1);
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} else {
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scl_v_factor = (dst_vactive << 16) / (src_vactive - 1);
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}
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} else if (src_vactive == dst_vactive) {
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scl_ver_mode = 0;
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scl_v_factor = 0;
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} else {
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scl_ver_mode = 1;
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scl_v_factor = ((src_vactive - 1) << 16) / (dst_vactive - 1);
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}
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rk628_i2c_update_bits(rk628, GRF_RGB_DEC_CON0, SW_HRES_MASK,
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SW_HRES(src_hactive));
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rk628_i2c_write(rk628, GRF_SCALER_CON0, SCL_VER_DOWN_MODE(ver_down_mode) |
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SCL_HOR_DOWN_MODE(hor_down_mode) |
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SCL_VER_MODE(scl_ver_mode) |
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SCL_HOR_MODE(scl_hor_mode));
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rk628_i2c_write(rk628, GRF_SCALER_CON1, SCL_V_FACTOR(scl_v_factor) |
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SCL_H_FACTOR(scl_h_factor));
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rk628_i2c_write(rk628, GRF_SCALER_CON2, DSP_FRAME_VST(dsp_frame_vst) |
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DSP_FRAME_HST(dsp_frame_hst));
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rk628_i2c_write(rk628, GRF_SCALER_CON3, DSP_HS_END(dsp_hs_end) |
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DSP_HTOTAL(dsp_htotal));
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rk628_i2c_write(rk628, GRF_SCALER_CON4, DSP_HACT_END(dsp_hact_end) |
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DSP_HACT_ST(dsp_hact_st));
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rk628_i2c_write(rk628, GRF_SCALER_CON5, DSP_VS_END(dsp_vs_end) |
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DSP_VTOTAL(dsp_vtotal));
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rk628_i2c_write(rk628, GRF_SCALER_CON6, DSP_VACT_END(dsp_vact_end) |
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DSP_VACT_ST(dsp_vact_st));
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rk628_i2c_write(rk628, GRF_SCALER_CON7, DSP_HBOR_END(dsp_hbor_end) |
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DSP_HBOR_ST(dsp_hbor_st));
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rk628_i2c_write(rk628, GRF_SCALER_CON8, DSP_VBOR_END(dsp_vbor_end) |
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DSP_VBOR_ST(dsp_vbor_st));
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}
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void rk628_post_process_init(struct rk628 *rk628)
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{
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struct rk628_display_mode *src = &rk628->src_mode;
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const struct rk628_display_mode *dst = &rk628->dst_mode;
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u64 dst_rate, src_rate;
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src_rate = src->clock * 1000;
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dst_rate = src_rate * dst->vdisplay * dst->htotal;
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do_div(dst_rate, (src->vdisplay * src->htotal));
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do_div(dst_rate, 1000);
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dev_info(rk628->dev, "src %dx%d clock:%d\n",
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src->hdisplay, src->vdisplay, src->clock);
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dev_info(rk628->dev, "dst %dx%d clock:%llu\n",
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dst->hdisplay, dst->vdisplay, dst_rate);
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rk628_cru_clk_set_rate(rk628, CGU_CLK_RX_READ, src->clock * 1000);
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rk628_cru_clk_set_rate(rk628, CGU_SCLK_VOP, dst_rate * 1000);
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if (rk628->output_mode == OUTPUT_MODE_HDMI) {
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rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0, SW_VSYNC_POL_MASK,
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SW_VSYNC_POL(rk628->sync_pol));
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rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0, SW_HSYNC_POL_MASK,
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SW_HSYNC_POL(rk628->sync_pol));
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} else {
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if (src->flags & DRM_MODE_FLAG_PVSYNC)
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rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0,
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SW_VSYNC_POL_MASK, SW_VSYNC_POL(1));
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if (src->flags & DRM_MODE_FLAG_PHSYNC)
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rk628_i2c_update_bits(rk628, GRF_SYSTEM_CON0,
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SW_HSYNC_POL_MASK,
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SW_HSYNC_POL(1));
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}
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rk628_post_process_scaler_init(rk628, src, dst);
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}
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static void rk628_post_process_csc(struct rk628 *rk628)
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{
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enum bus_format in_fmt, out_fmt;
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in_fmt = rk628_get_input_bus_format(rk628);
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out_fmt = rk628_get_output_bus_format(rk628);
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if (in_fmt == out_fmt) {
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if (out_fmt == BUS_FMT_YUV422) {
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rk628_i2c_write(rk628, GRF_CSC_CTRL_CON,
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SW_YUV2VYU_SWP(1) |
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SW_R2Y_EN(0));
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return;
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}
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rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_R2Y_EN(0));
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rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_Y2R_EN(0));
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return;
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}
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if (in_fmt == BUS_FMT_RGB)
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rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_R2Y_EN(1));
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else if (out_fmt == BUS_FMT_RGB)
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rk628_i2c_write(rk628, GRF_CSC_CTRL_CON, SW_Y2R_EN(1));
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}
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void rk628_post_process_enable(struct rk628 *rk628)
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{
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rk628_post_process_csc(rk628);
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rk628_i2c_write(rk628, GRF_SCALER_CON0, SCL_EN(1));
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}
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void rk628_post_process_disable(struct rk628 *rk628)
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{
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rk628_i2c_write(rk628, GRF_SCALER_CON0, SCL_EN(0));
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}
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