// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 Rockchip Electronics Co. Ltd.
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*
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* Author: Guochun Huang <hero.huang@rock-chips.com>
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*/
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#include "rk628.h"
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#include "rk628_combtxphy.h"
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#include "rk628_config.h"
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#include "panel.h"
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static inline void lvds_write(struct rk628 *rk628, u32 reg, u32 val)
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{
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rk628_i2c_write(rk628, reg, val);
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}
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static inline void lvds_update_bits(struct rk628 *rk628, u32 reg,
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u32 mask, u32 val)
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{
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rk628_i2c_update_bits(rk628, reg, mask, val);
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}
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int rk628_lvds_parse(struct rk628 *rk628, struct device_node *lvds_np)
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{
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const char *string;
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int ret;
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if (!of_device_is_available(lvds_np))
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return -EINVAL;
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rk628->output_mode = OUTPUT_MODE_LVDS;
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if (!of_property_read_string(lvds_np, "bus-format", &string)) {
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if (!strcmp(string, "jeida_24"))
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rk628->lvds.format = LVDS_FORMAT_JEIDA_24BIT;
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else if (!strcmp(string, "jeida_18"))
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rk628->lvds.format = LVDS_FORMAT_JEIDA_18BIT;
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else if (!strcmp(string, "vesa_18"))
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rk628->lvds.format = LVDS_FORMAT_VESA_18BIT;
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else
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rk628->lvds.format = LVDS_FORMAT_VESA_24BIT;
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}
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if (!of_property_read_string(lvds_np, "link-type", &string)) {
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if (!strcmp(string, "dual_link_odd_even_pixels"))
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rk628->lvds.link_type = LVDS_DUAL_LINK_ODD_EVEN_PIXELS;
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else if (!strcmp(string, "dual_link_even_odd_pixels"))
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rk628->lvds.link_type = LVDS_DUAL_LINK_EVEN_ODD_PIXELS;
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else if (!strcmp(string, "dual_link_left_right_pixels"))
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rk628->lvds.link_type = LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS;
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else if (!strcmp(string, "dual_link_right_left_pixels"))
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rk628->lvds.link_type = LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS;
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else
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rk628->lvds.link_type = LVDS_SINGLE_LINK;
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}
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ret = rk628_panel_info_get(rk628, lvds_np);
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if (ret)
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return ret;
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return 0;
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}
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void rk628_lvds_enable(struct rk628 *rk628)
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{
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enum lvds_link_type link_type = rk628->lvds.link_type;
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enum lvds_format format = rk628->lvds.format;
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const struct rk628_display_mode *mode = &rk628->dst_mode;
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u32 val, bus_width;
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lvds_update_bits(rk628, GRF_SYSTEM_CON0, SW_OUTPUT_MODE_MASK,
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SW_OUTPUT_MODE(OUTPUT_MODE_LVDS));
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switch (link_type) {
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case LVDS_DUAL_LINK_ODD_EVEN_PIXELS:
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val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(0) |
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SW_LVDS_CON_DUAL_SEL(0);
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bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
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break;
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case LVDS_DUAL_LINK_EVEN_ODD_PIXELS:
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val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(1) |
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SW_LVDS_CON_DUAL_SEL(0);
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bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
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break;
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case LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS:
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val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(0) |
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SW_LVDS_CON_DUAL_SEL(1);
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lvds_update_bits(rk628, GRF_POST_PROC_CON,
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SW_SPLIT_EN, SW_SPLIT_EN);
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bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
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break;
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case LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS:
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val = SW_LVDS_CON_CHASEL(1) | SW_LVDS_CON_STARTSEL(1) |
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SW_LVDS_CON_DUAL_SEL(1);
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lvds_update_bits(rk628, GRF_POST_PROC_CON,
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SW_SPLIT_EN, SW_SPLIT_EN);
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bus_width = COMBTXPHY_MODULEA_EN | COMBTXPHY_MODULEB_EN;
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break;
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case LVDS_SINGLE_LINK:
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default:
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val = SW_LVDS_CON_CHASEL(0) | SW_LVDS_CON_STARTSEL(0) |
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SW_LVDS_CON_DUAL_SEL(0);
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bus_width = COMBTXPHY_MODULEA_EN;
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break;
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}
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val |= SW_LVDS_CON_SELECT(format) | SW_LVDS_CON_MSBSEL(0) |
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SW_LVDS_CON_CLKINV(0);
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lvds_write(rk628, GRF_LVDS_TX_CON, val);
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bus_width |= (mode->clock / 1000) << 8;
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rk628_combtxphy_set_bus_width(rk628, bus_width);
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rk628_combtxphy_set_mode(rk628, PHY_MODE_VIDEO_LVDS);
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rk628_combtxphy_power_on(rk628);
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rk628_panel_prepare(rk628);
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rk628_panel_enable(rk628);
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}
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void rk628_lvds_disable(struct rk628 *rk628)
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{
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rk628_panel_disable(rk628);
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rk628_panel_unprepare(rk628);
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rk628_combtxphy_power_off(rk628);
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}
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