// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Rockchip Electronics Co. Ltd.
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*
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* Author: Guochun Huang <hero.huang@rock-chips.com>
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*/
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#include <linux/kernel.h>
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#include "rkx110_x120.h"
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#include "serdes_combphy.h"
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int serdes_combphy_write(struct rk_serdes *serdes, u8 remote_id, u32 reg, u32 val)
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{
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struct i2c_client *client = serdes->chip[remote_id].client;
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return serdes->i2c_write_reg(client, reg, val);
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}
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int serdes_combphy_read(struct rk_serdes *serdes, u8 remote_id, u32 reg, u32 *val)
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{
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struct i2c_client *client = serdes->chip[remote_id].client;
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return serdes->i2c_read_reg(client, reg, val);
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}
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int serdes_combphy_update_bits(struct rk_serdes *serdes, u8 remote_id,
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u32 reg, u32 mask, u32 val)
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{
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struct i2c_client *client = serdes->chip[remote_id].client;
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return serdes->i2c_update_bits(client, reg, mask, val);
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}
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void serdes_combphy_get_default_config(u64 hs_clk_rate,
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struct configure_opts_combphy *cfg)
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{
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unsigned long long ui;
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ui = ALIGN(NSEC_PER_SEC, hs_clk_rate);
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do_div(ui, hs_clk_rate);
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cfg->clk_miss = 0;
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cfg->clk_post = 60 + 52 * ui;
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cfg->clk_pre = 8;
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cfg->clk_prepare = 38;
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cfg->clk_settle = 95;
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cfg->clk_term_en = 0;
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cfg->clk_trail = 60;
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cfg->clk_zero = 262;
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cfg->d_term_en = 0;
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cfg->eot = 0;
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cfg->hs_exit = 100;
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cfg->hs_prepare = 40 + 4 * ui;
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cfg->hs_zero = 105 + 6 * ui;
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cfg->hs_settle = 85 + 6 * ui;
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cfg->hs_skip = 40;
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/*
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* The MIPI D-PHY specification (Section 6.9, v1.2, Table 14, Page 40)
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* contains this formula as:
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*
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* T_HS-TRAIL = max(n * 8 * ui, 60 + n * 4 * ui)
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*
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* where n = 1 for forward-direction HS mode and n = 4 for reverse-
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* direction HS mode. There's only one setting and this function does
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* not parameterize on anything other that ui, so this code will
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* assumes that reverse-direction HS mode is supported and uses n = 4.
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*/
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cfg->hs_trail = max(4 * 8 * ui, 60 + 4 * 4 * ui);
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/*
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* Note that TINIT is considered a protocol-dependent parameter, and
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* thus the exact requirements for TINIT,MASTER and TINIT,SLAVE (transmitter
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* and receiver initialization Stop state lengths, respectively,) are defined
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* by the protocol layer specification and are outside the scope of this document.
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* However, the D-PHY specification does place a minimum bound on the lengths of
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* TINIT,MASTER and TINIT,SLAVE, which each shall be no less than 100 µs. A protocol
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* layer specification using the D-PHY specification may specify any values greater
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* than this limit, for example, TINIT,MASTER ≥ 1 ms and TINIT,SLAVE = 500 to 800 µs
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*/
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cfg->init = NSEC_PER_SEC / MSEC_PER_SEC;
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cfg->lpx = 50;
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cfg->ta_get = 5 * cfg->lpx;
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cfg->ta_go = 4 * cfg->lpx;
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cfg->ta_sure = cfg->lpx;
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cfg->wakeup = NSEC_PER_SEC / MSEC_PER_SEC;
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}
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