// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* maxim-max96789.c -- I2C register interface access for max96789 serdes chip
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*
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* Copyright (c) 2023-2028 Rockchip Electronics Co. Ltd.
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*
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* Author:
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*/
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#include "../core.h"
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#include "maxim-max96789.h"
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static bool max96789_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case 0x0076:
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case 0x0086:
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case 0x0100:
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case 0x0200 ... 0x02ce:
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case 0x7000:
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case 0x7070:
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case 0x7074:
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return false;
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default:
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return true;
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}
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}
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static struct regmap_config max96789_regmap_config = {
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.name = "max96789",
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.reg_bits = 16,
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.val_bits = 8,
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.max_register = 0x8000,
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.volatile_reg = max96789_volatile_reg,
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.cache_type = REGCACHE_RBTREE,
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};
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static int MAX96789_MFP0_pins[] = {0};
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static int MAX96789_MFP1_pins[] = {1};
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static int MAX96789_MFP2_pins[] = {2};
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static int MAX96789_MFP3_pins[] = {3};
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static int MAX96789_MFP4_pins[] = {4};
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static int MAX96789_MFP5_pins[] = {5};
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static int MAX96789_MFP6_pins[] = {6};
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static int MAX96789_MFP7_pins[] = {7};
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static int MAX96789_MFP8_pins[] = {8};
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static int MAX96789_MFP9_pins[] = {9};
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static int MAX96789_MFP10_pins[] = {10};
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static int MAX96789_MFP11_pins[] = {11};
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static int MAX96789_MFP12_pins[] = {12};
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static int MAX96789_MFP13_pins[] = {13};
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static int MAX96789_MFP14_pins[] = {14};
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static int MAX96789_MFP15_pins[] = {15};
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static int MAX96789_MFP16_pins[] = {16};
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static int MAX96789_MFP17_pins[] = {17};
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static int MAX96789_MFP18_pins[] = {18};
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static int MAX96789_MFP19_pins[] = {19};
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static int MAX96789_MFP20_pins[] = {20};
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#define GROUP_DESC(nm) \
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{ \
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.name = #nm, \
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.pins = nm ## _pins, \
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.num_pins = ARRAY_SIZE(nm ## _pins), \
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}
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struct serdes_function_data {
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u8 gpio_out_dis:1;
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u8 gpio_tx_en:1;
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u8 gpio_rx_en:1;
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u8 gpio_tx_id;
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u8 gpio_rx_id;
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};
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static const char *serdes_gpio_groups[] = {
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"MAX96789_MFP0", "MAX96789_MFP1", "MAX96789_MFP2", "MAX96789_MFP3",
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"MAX96789_MFP4", "MAX96789_MFP5", "MAX96789_MFP6", "MAX96789_MFP7",
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"MAX96789_MFP8", "MAX96789_MFP9", "MAX96789_MFP10", "MAX96789_MFP11",
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"MAX96789_MFP12", "MAX96789_MFP13", "MAX96789_MFP14", "MAX96789_MFP15",
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"MAX96789_MFP16", "MAX96789_MFP17", "MAX96789_MFP18", "MAX96789_MFP19",
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"MAX96789_MFP20",
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};
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#define FUNCTION_DESC_GPIO_INPUT(id) \
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{ \
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.name = "DES_GPIO"#id"_INPUT", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_rx_en = 1, .gpio_rx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_OUTPUT(id) \
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{ \
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.name = "DES_GPIO"#id"_OUTPUT", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_out_dis = 1, .gpio_tx_en = 1, .gpio_tx_id = id } \
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}, \
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} \
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static struct pinctrl_pin_desc max96789_pins_desc[] = {
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PINCTRL_PIN(MAXIM_MAX96789_MFP0, "MAX96789_MFP0"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP1, "MAX96789_MFP1"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP2, "MAX96789_MFP2"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP3, "MAX96789_MFP3"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP4, "MAX96789_MFP4"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP5, "MAX96789_MFP5"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP6, "MAX96789_MFP6"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP7, "MAX96789_MFP7"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP8, "MAX96789_MFP8"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP9, "MAX96789_MFP9"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP10, "MAX96789_MFP10"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP11, "MAX96789_MFP11"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP12, "MAX96789_MFP12"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP13, "MAX96789_MFP13"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP14, "MAX96789_MFP14"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP15, "MAX96789_MFP15"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP16, "MAX96789_MFP16"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP17, "MAX96789_MFP17"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP18, "MAX96789_MFP18"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP19, "MAX96789_MFP19"),
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PINCTRL_PIN(MAXIM_MAX96789_MFP20, "MAX96789_MFP20"),
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};
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static struct group_desc max96789_groups_desc[] = {
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GROUP_DESC(MAX96789_MFP0),
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GROUP_DESC(MAX96789_MFP1),
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GROUP_DESC(MAX96789_MFP2),
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GROUP_DESC(MAX96789_MFP3),
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GROUP_DESC(MAX96789_MFP4),
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GROUP_DESC(MAX96789_MFP5),
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GROUP_DESC(MAX96789_MFP6),
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GROUP_DESC(MAX96789_MFP7),
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GROUP_DESC(MAX96789_MFP8),
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GROUP_DESC(MAX96789_MFP9),
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GROUP_DESC(MAX96789_MFP10),
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GROUP_DESC(MAX96789_MFP11),
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GROUP_DESC(MAX96789_MFP12),
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GROUP_DESC(MAX96789_MFP13),
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GROUP_DESC(MAX96789_MFP14),
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GROUP_DESC(MAX96789_MFP15),
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GROUP_DESC(MAX96789_MFP16),
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GROUP_DESC(MAX96789_MFP17),
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GROUP_DESC(MAX96789_MFP18),
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GROUP_DESC(MAX96789_MFP19),
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GROUP_DESC(MAX96789_MFP20),
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};
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static struct function_desc max96789_functions_desc[] = {
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FUNCTION_DESC_GPIO_INPUT(0),
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FUNCTION_DESC_GPIO_INPUT(1),
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FUNCTION_DESC_GPIO_INPUT(2),
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FUNCTION_DESC_GPIO_INPUT(3),
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FUNCTION_DESC_GPIO_INPUT(4),
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FUNCTION_DESC_GPIO_INPUT(5),
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FUNCTION_DESC_GPIO_INPUT(6),
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FUNCTION_DESC_GPIO_INPUT(7),
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FUNCTION_DESC_GPIO_INPUT(8),
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FUNCTION_DESC_GPIO_INPUT(9),
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FUNCTION_DESC_GPIO_INPUT(10),
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FUNCTION_DESC_GPIO_INPUT(11),
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FUNCTION_DESC_GPIO_INPUT(12),
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FUNCTION_DESC_GPIO_INPUT(13),
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FUNCTION_DESC_GPIO_INPUT(14),
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FUNCTION_DESC_GPIO_INPUT(15),
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FUNCTION_DESC_GPIO_INPUT(16),
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FUNCTION_DESC_GPIO_INPUT(17),
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FUNCTION_DESC_GPIO_INPUT(18),
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FUNCTION_DESC_GPIO_INPUT(19),
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FUNCTION_DESC_GPIO_INPUT(20),
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FUNCTION_DESC_GPIO_OUTPUT(0),
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FUNCTION_DESC_GPIO_OUTPUT(1),
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FUNCTION_DESC_GPIO_OUTPUT(2),
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FUNCTION_DESC_GPIO_OUTPUT(3),
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FUNCTION_DESC_GPIO_OUTPUT(4),
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FUNCTION_DESC_GPIO_OUTPUT(5),
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FUNCTION_DESC_GPIO_OUTPUT(6),
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FUNCTION_DESC_GPIO_OUTPUT(7),
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FUNCTION_DESC_GPIO_OUTPUT(8),
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FUNCTION_DESC_GPIO_OUTPUT(9),
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FUNCTION_DESC_GPIO_OUTPUT(10),
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FUNCTION_DESC_GPIO_OUTPUT(11),
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FUNCTION_DESC_GPIO_OUTPUT(12),
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FUNCTION_DESC_GPIO_OUTPUT(13),
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FUNCTION_DESC_GPIO_OUTPUT(14),
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FUNCTION_DESC_GPIO_OUTPUT(15),
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FUNCTION_DESC_GPIO_OUTPUT(16),
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FUNCTION_DESC_GPIO_OUTPUT(17),
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FUNCTION_DESC_GPIO_OUTPUT(18),
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FUNCTION_DESC_GPIO_OUTPUT(19),
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FUNCTION_DESC_GPIO_OUTPUT(20),
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};
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static struct serdes_chip_pinctrl_info max96789_pinctrl_info = {
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.pins = max96789_pins_desc,
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.num_pins = ARRAY_SIZE(max96789_pins_desc),
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.groups = max96789_groups_desc,
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.num_groups = ARRAY_SIZE(max96789_groups_desc),
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.functions = max96789_functions_desc,
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.num_functions = ARRAY_SIZE(max96789_functions_desc),
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};
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static int max96789_bridge_init(struct serdes *serdes)
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{
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return 0;
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}
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static int max96789_bridge_enable(struct serdes *serdes)
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{
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return 0;
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}
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static int max96789_bridge_disable(struct serdes *serdes)
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{
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return 0;
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}
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static struct serdes_chip_bridge_ops max96789_bridge_ops = {
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.init = max96789_bridge_init,
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.enable = max96789_bridge_enable,
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.disable = max96789_bridge_disable,
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};
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static int max96789_pinctrl_config_get(struct serdes *serdes,
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unsigned int pin,
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unsigned long *config)
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{
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return 0;
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}
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static int max96789_pinctrl_config_set(struct serdes *serdes,
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unsigned int pin,
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unsigned long *configs,
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unsigned int num_configs)
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{
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return 0;
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}
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static int max96789_pinctrl_set_mux(struct serdes *serdes, unsigned int func_selector,
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unsigned int group_selector)
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{
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return 0;
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}
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static struct serdes_chip_pinctrl_ops max96789_pinctrl_ops = {
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.pin_config_get = max96789_pinctrl_config_get,
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.pin_config_set = max96789_pinctrl_config_set,
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.set_mux = max96789_pinctrl_set_mux,
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};
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static int max96789_gpio_direction_input(struct serdes *serdes, int gpio)
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{
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return 0;
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}
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static int max96789_gpio_direction_output(struct serdes *serdes, int gpio, int value)
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{
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return 0;
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}
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static int max96789_gpio_get_level(struct serdes *serdes, int gpio)
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{
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return 0;
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}
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static int max96789_gpio_set_level(struct serdes *serdes, int gpio, int value)
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{
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return 0;
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}
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static int max96789_gpio_set_config(struct serdes *serdes, int gpio, unsigned long config)
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{
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return 0;
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}
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static int max96789_gpio_to_irq(struct serdes *serdes, int gpio)
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{
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return 0;
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}
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static struct serdes_chip_gpio_ops max96789_gpio_ops = {
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.direction_input = max96789_gpio_direction_input,
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.direction_output = max96789_gpio_direction_output,
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.get_level = max96789_gpio_get_level,
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.set_level = max96789_gpio_set_level,
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.set_config = max96789_gpio_set_config,
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.to_irq = max96789_gpio_to_irq,
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};
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static int max96789_pm_suspend(struct serdes *serdes)
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{
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return 0;
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}
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static int max96789_pm_resume(struct serdes *serdes)
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{
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return 0;
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}
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static struct serdes_chip_pm_ops max96789_pm_ops = {
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.suspend = max96789_pm_suspend,
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.resume = max96789_pm_resume,
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};
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static int max96789_irq_lock_handle(struct serdes *serdes)
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{
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return IRQ_HANDLED;
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}
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static int max96789_irq_err_handle(struct serdes *serdes)
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{
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return IRQ_HANDLED;
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}
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static struct serdes_chip_irq_ops max96789_irq_ops = {
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.lock_handle = max96789_irq_lock_handle,
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.err_handle = max96789_irq_err_handle,
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};
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struct serdes_chip_data serdes_max96789_data = {
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.name = "max96789",
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.serdes_type = TYPE_SER,
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.serdes_id = MAXIM_ID_MAX96789,
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.connector_type = DRM_MODE_CONNECTOR_DSI,
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.regmap_config = &max96789_regmap_config,
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.pinctrl_info = &max96789_pinctrl_info,
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.bridge_ops = &max96789_bridge_ops,
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.pinctrl_ops = &max96789_pinctrl_ops,
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.gpio_ops = &max96789_gpio_ops,
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.pm_ops = &max96789_pm_ops,
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.irq_ops = &max96789_irq_ops,
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};
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EXPORT_SYMBOL_GPL(serdes_max96789_data);
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MODULE_LICENSE("GPL");
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