// SPDX-License-Identifier: GPL-2.0
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/*
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* pisp_dmy driver
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*
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* Copyright (C) 2020 Rockchip Electronics Co., Ltd.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#include <media/v4l2-fwnode.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/mfd/syscon.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <linux/rk-preisp.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x0)
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#ifndef V4L2_CID_DIGITAL_GAIN
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#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
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#endif
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#define PISP_DMY_XVCLK_FREQ 24000000
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#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
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#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
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#define OF_CAMERA_MODULE_REGULATORS "rockchip,regulator-names"
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#define OF_CAMERA_MODULE_REGULATOR_VOLTAGES "rockchip,regulator-voltages"
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#define PISP_DMY_NAME "pisp_dmy"
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struct pisp_dmy_gpio {
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int pltfrm_gpio;
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const char *label;
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enum of_gpio_flags active_low;
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};
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struct pisp_dmy_regulator {
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struct regulator *regulator;
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u32 min_uV;
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u32 max_uV;
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};
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struct pisp_dmy_regulators {
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u32 cnt;
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struct pisp_dmy_regulator *regulator;
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};
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struct pisp_dmy {
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *rst_gpio;
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struct gpio_desc *rst2_gpio;
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struct gpio_desc *pd_gpio;
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struct gpio_desc *pd2_gpio;
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struct gpio_desc *pwd_gpio;
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struct gpio_desc *pwd2_gpio;
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default;
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struct pinctrl_state *pins_sleep;
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct mutex mutex;
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bool power_on;
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struct pisp_dmy_regulators regulators;
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u32 module_index;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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};
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#define to_pisp_dmy(sd) container_of(sd, struct pisp_dmy, subdev)
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static int __pisp_dmy_power_on(struct pisp_dmy *pisp_dmy)
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{
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u32 i;
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int ret;
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struct pisp_dmy_regulator *regulator;
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struct device *dev = &pisp_dmy->client->dev;
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if (!IS_ERR_OR_NULL(pisp_dmy->pins_default)) {
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ret = pinctrl_select_state(pisp_dmy->pinctrl,
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pisp_dmy->pins_default);
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if (ret < 0)
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dev_err(dev, "could not set pins. ret=%d\n", ret);
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}
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ret = clk_prepare_enable(pisp_dmy->xvclk);
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if (ret < 0) {
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dev_err(dev, "Failed to enable xvclk\n");
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return ret;
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}
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if (pisp_dmy->regulators.regulator) {
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for (i = 0; i < pisp_dmy->regulators.cnt; i++) {
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regulator = pisp_dmy->regulators.regulator + i;
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if (IS_ERR(regulator->regulator))
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continue;
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regulator_set_voltage(
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regulator->regulator,
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regulator->min_uV,
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regulator->max_uV);
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if (regulator_enable(regulator->regulator)) {
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dev_err(dev,
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"regulator_enable failed!\n");
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goto disable_clk;
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}
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}
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}
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usleep_range(3000, 5000);
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if (!IS_ERR(pisp_dmy->pwd_gpio)) {
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gpiod_direction_output(pisp_dmy->pwd_gpio, 1);
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usleep_range(3000, 5000);
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}
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if (!IS_ERR(pisp_dmy->pwd2_gpio)) {
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gpiod_direction_output(pisp_dmy->pwd2_gpio, 1);
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usleep_range(3000, 5000);
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}
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if (!IS_ERR(pisp_dmy->pd_gpio)) {
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gpiod_direction_output(pisp_dmy->pd_gpio, 1);
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usleep_range(1500, 2000);
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}
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if (!IS_ERR(pisp_dmy->pd2_gpio)) {
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gpiod_direction_output(pisp_dmy->pd2_gpio, 1);
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usleep_range(1500, 2000);
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}
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if (!IS_ERR(pisp_dmy->rst_gpio)) {
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gpiod_direction_output(pisp_dmy->rst_gpio, 0);
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usleep_range(1500, 2000);
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gpiod_direction_output(pisp_dmy->rst_gpio, 1);
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}
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if (!IS_ERR(pisp_dmy->rst2_gpio)) {
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gpiod_direction_output(pisp_dmy->rst2_gpio, 0);
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usleep_range(1500, 2000);
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gpiod_direction_output(pisp_dmy->rst2_gpio, 1);
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}
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return 0;
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disable_clk:
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clk_disable_unprepare(pisp_dmy->xvclk);
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return ret;
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}
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static void __pisp_dmy_power_off(struct pisp_dmy *pisp_dmy)
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{
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u32 i;
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int ret;
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struct pisp_dmy_regulator *regulator;
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struct device *dev = &pisp_dmy->client->dev;
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if (!IS_ERR(pisp_dmy->pd_gpio))
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gpiod_direction_output(pisp_dmy->pd_gpio, 0);
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if (!IS_ERR(pisp_dmy->pd2_gpio))
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gpiod_direction_output(pisp_dmy->pd2_gpio, 0);
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clk_disable_unprepare(pisp_dmy->xvclk);
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if (!IS_ERR(pisp_dmy->rst_gpio))
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gpiod_direction_output(pisp_dmy->rst_gpio, 0);
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if (!IS_ERR(pisp_dmy->rst2_gpio))
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gpiod_direction_output(pisp_dmy->rst2_gpio, 0);
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if (!IS_ERR(pisp_dmy->pwd_gpio))
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gpiod_direction_output(pisp_dmy->pwd_gpio, 0);
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if (!IS_ERR(pisp_dmy->pwd2_gpio))
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gpiod_direction_output(pisp_dmy->pwd2_gpio, 0);
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if (!IS_ERR_OR_NULL(pisp_dmy->pins_sleep)) {
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ret = pinctrl_select_state(pisp_dmy->pinctrl,
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pisp_dmy->pins_sleep);
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if (ret < 0)
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dev_err(dev, "could not set pins\n");
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}
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if (pisp_dmy->regulators.regulator) {
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for (i = 0; i < pisp_dmy->regulators.cnt; i++) {
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regulator = pisp_dmy->regulators.regulator + i;
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if (IS_ERR(regulator->regulator))
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continue;
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regulator_disable(regulator->regulator);
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}
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}
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}
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static int pisp_dmy_power(struct v4l2_subdev *sd, int on)
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{
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struct pisp_dmy *pisp_dmy = to_pisp_dmy(sd);
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int ret = 0;
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mutex_lock(&pisp_dmy->mutex);
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/* If the power state is not modified - no work to do. */
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if (pisp_dmy->power_on == !!on)
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goto exit;
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if (on) {
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ret = __pisp_dmy_power_on(pisp_dmy);
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if (ret < 0)
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goto exit;
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pisp_dmy->power_on = true;
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} else {
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__pisp_dmy_power_off(pisp_dmy);
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pisp_dmy->power_on = false;
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}
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exit:
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mutex_unlock(&pisp_dmy->mutex);
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return ret;
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}
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static void pisp_dmy_get_module_inf(struct pisp_dmy *pisp_dmy,
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struct rkmodule_inf *inf)
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{
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memset(inf, 0, sizeof(*inf));
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strlcpy(inf->base.sensor, PISP_DMY_NAME, sizeof(inf->base.sensor));
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strlcpy(inf->base.module, pisp_dmy->module_name,
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sizeof(inf->base.module));
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strlcpy(inf->base.lens, pisp_dmy->len_name, sizeof(inf->base.lens));
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}
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static long pisp_dmy_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
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{
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struct pisp_dmy *pisp_dmy = to_pisp_dmy(sd);
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long ret = 0;
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switch (cmd) {
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case RKMODULE_GET_MODULE_INFO:
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pisp_dmy_get_module_inf(pisp_dmy, (struct rkmodule_inf *)arg);
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break;
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default:
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ret = -ENOTTY;
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break;
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}
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return ret;
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}
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#ifdef CONFIG_COMPAT
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static long pisp_dmy_compat_ioctl32(struct v4l2_subdev *sd,
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unsigned int cmd, unsigned long arg)
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{
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void __user *up = compat_ptr(arg);
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struct rkmodule_inf *inf;
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struct rkmodule_awb_cfg *cfg;
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long ret;
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switch (cmd) {
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case RKMODULE_GET_MODULE_INFO:
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inf = kzalloc(sizeof(*inf), GFP_KERNEL);
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if (!inf) {
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ret = -ENOMEM;
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return ret;
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}
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ret = pisp_dmy_ioctl(sd, cmd, inf);
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if (!ret)
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if (copy_to_user(up, inf, sizeof(*inf))) {
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kfree(inf);
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return -EFAULT;
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}
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kfree(inf);
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break;
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case RKMODULE_AWB_CFG:
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg) {
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ret = -ENOMEM;
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return ret;
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}
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if (copy_from_user(cfg, up, sizeof(*cfg))) {
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kfree(cfg);
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return -EFAULT;
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}
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ret = pisp_dmy_ioctl(sd, cmd, cfg);
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kfree(cfg);
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break;
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default:
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ret = -ENOIOCTLCMD;
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break;
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}
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return ret;
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}
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#endif
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static int pisp_dmy_runtime_resume(struct device *dev)
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{
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struct i2c_client *client = to_i2c_client(dev);
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struct v4l2_subdev *sd = i2c_get_clientdata(client);
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struct pisp_dmy *pisp_dmy = to_pisp_dmy(sd);
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return __pisp_dmy_power_on(pisp_dmy);
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}
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static int pisp_dmy_runtime_suspend(struct device *dev)
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{
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struct i2c_client *client = to_i2c_client(dev);
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struct v4l2_subdev *sd = i2c_get_clientdata(client);
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struct pisp_dmy *pisp_dmy = to_pisp_dmy(sd);
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__pisp_dmy_power_off(pisp_dmy);
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return 0;
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}
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static const struct dev_pm_ops pisp_dmy_pm_ops = {
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SET_RUNTIME_PM_OPS(pisp_dmy_runtime_suspend,
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pisp_dmy_runtime_resume, NULL)
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};
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static const struct v4l2_subdev_core_ops pisp_dmy_core_ops = {
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.s_power = pisp_dmy_power,
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.ioctl = pisp_dmy_ioctl,
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#ifdef CONFIG_COMPAT
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.compat_ioctl32 = pisp_dmy_compat_ioctl32,
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#endif
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};
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static const struct v4l2_subdev_ops pisp_dmy_subdev_ops = {
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.core = &pisp_dmy_core_ops,
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};
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static int pisp_dmy_analyze_dts(struct pisp_dmy *pisp_dmy)
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{
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int ret;
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int elem_size, elem_index;
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const char *str = "";
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struct property *prop;
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struct pisp_dmy_regulator *regulator;
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struct device *dev = &pisp_dmy->client->dev;
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struct device_node *np = of_node_get(dev->of_node);
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pisp_dmy->xvclk = devm_clk_get(dev, "xvclk");
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if (IS_ERR(pisp_dmy->xvclk)) {
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dev_err(dev, "Failed to get xvclk\n");
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return -EINVAL;
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}
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ret = clk_set_rate(pisp_dmy->xvclk, PISP_DMY_XVCLK_FREQ);
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if (ret < 0) {
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dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
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return ret;
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}
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if (clk_get_rate(pisp_dmy->xvclk) != PISP_DMY_XVCLK_FREQ)
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dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
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pisp_dmy->pinctrl = devm_pinctrl_get(dev);
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if (!IS_ERR(pisp_dmy->pinctrl)) {
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pisp_dmy->pins_default =
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pinctrl_lookup_state(pisp_dmy->pinctrl,
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OF_CAMERA_PINCTRL_STATE_DEFAULT);
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if (IS_ERR(pisp_dmy->pins_default))
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dev_err(dev, "could not get default pinstate\n");
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pisp_dmy->pins_sleep =
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pinctrl_lookup_state(pisp_dmy->pinctrl,
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OF_CAMERA_PINCTRL_STATE_SLEEP);
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if (IS_ERR(pisp_dmy->pins_sleep))
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dev_err(dev, "could not get sleep pinstate\n");
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} else {
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dev_err(dev, "no pinctrl\n");
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}
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elem_size = of_property_count_elems_of_size(
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np,
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OF_CAMERA_MODULE_REGULATOR_VOLTAGES,
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sizeof(u32));
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prop = of_find_property(
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np,
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OF_CAMERA_MODULE_REGULATORS,
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NULL);
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if (elem_size > 0 && !IS_ERR_OR_NULL(prop)) {
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pisp_dmy->regulators.regulator =
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devm_kzalloc(&pisp_dmy->client->dev,
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elem_size * sizeof(struct pisp_dmy_regulator),
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GFP_KERNEL);
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if (!pisp_dmy->regulators.regulator) {
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dev_err(dev, "could not malloc pisp_dmy_regulator\n");
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return -ENOMEM;
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}
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pisp_dmy->regulators.cnt = elem_size;
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str = NULL;
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elem_index = 0;
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regulator = pisp_dmy->regulators.regulator;
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do {
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str = of_prop_next_string(prop, str);
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if (!str) {
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dev_err(dev, "%s is not match %s in dts\n",
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OF_CAMERA_MODULE_REGULATORS,
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OF_CAMERA_MODULE_REGULATOR_VOLTAGES);
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break;
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}
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regulator->regulator =
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devm_regulator_get_optional(dev, str);
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if (IS_ERR(regulator->regulator))
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dev_err(dev, "devm_regulator_get %s failed\n",
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str);
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of_property_read_u32_index(
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np,
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OF_CAMERA_MODULE_REGULATOR_VOLTAGES,
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elem_index++,
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®ulator->min_uV);
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regulator->max_uV = regulator->min_uV;
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regulator++;
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} while (--elem_size);
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}
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pisp_dmy->pd_gpio = devm_gpiod_get(dev, "pd", GPIOD_OUT_LOW);
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if (IS_ERR(pisp_dmy->pd_gpio))
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dev_warn(dev, "can not find pd-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->pd_gpio));
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pisp_dmy->pd2_gpio = devm_gpiod_get(dev, "pd2", GPIOD_OUT_LOW);
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if (IS_ERR(pisp_dmy->pd2_gpio))
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dev_warn(dev, "can not find pd2-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->pd2_gpio));
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pisp_dmy->rst_gpio = devm_gpiod_get(dev, "rst", GPIOD_OUT_LOW);
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if (IS_ERR(pisp_dmy->rst_gpio))
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dev_warn(dev, "can not find rst-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->rst_gpio));
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pisp_dmy->rst2_gpio = devm_gpiod_get(dev, "rst2", GPIOD_OUT_LOW);
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if (IS_ERR(pisp_dmy->rst2_gpio))
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dev_warn(dev, "can not find rst2-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->rst2_gpio));
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pisp_dmy->pwd_gpio = devm_gpiod_get(dev, "pwd", GPIOD_OUT_HIGH);
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if (IS_ERR(pisp_dmy->pwd_gpio))
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dev_warn(dev, "can not find pwd-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->pwd_gpio));
|
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pisp_dmy->pwd2_gpio = devm_gpiod_get(dev, "pwd2", GPIOD_OUT_HIGH);
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if (IS_ERR(pisp_dmy->pwd2_gpio))
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dev_warn(dev, "can not find pwd2-gpios, error %ld\n",
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PTR_ERR(pisp_dmy->pwd2_gpio));
|
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return 0;
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}
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static int pisp_dmy_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
|
{
|
struct device *dev = &client->dev;
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struct device_node *node = dev->of_node;
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struct pisp_dmy *pisp_dmy;
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struct v4l2_subdev *sd;
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int ret;
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|
dev_info(dev, "driver version: %02x.%02x.%02x",
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DRIVER_VERSION >> 16,
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(DRIVER_VERSION & 0xff00) >> 8,
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DRIVER_VERSION & 0x00ff);
|
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pisp_dmy = devm_kzalloc(dev, sizeof(*pisp_dmy), GFP_KERNEL);
|
if (!pisp_dmy)
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return -ENOMEM;
|
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ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
|
&pisp_dmy->module_index);
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
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&pisp_dmy->module_facing);
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ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
|
&pisp_dmy->module_name);
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ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
|
&pisp_dmy->len_name);
|
if (ret) {
|
dev_err(dev, "could not get module information!\n");
|
return -EINVAL;
|
}
|
|
pisp_dmy->client = client;
|
|
ret = pisp_dmy_analyze_dts(pisp_dmy);
|
if (ret) {
|
dev_err(dev, "Failed to analyze dts\n");
|
return ret;
|
}
|
|
mutex_init(&pisp_dmy->mutex);
|
|
sd = &pisp_dmy->subdev;
|
v4l2_i2c_subdev_init(sd, client, &pisp_dmy_subdev_ops);
|
|
__pisp_dmy_power_on(pisp_dmy);
|
|
pm_runtime_set_active(dev);
|
pm_runtime_enable(dev);
|
pm_runtime_idle(dev);
|
|
return 0;
|
}
|
|
static int pisp_dmy_remove(struct i2c_client *client)
|
{
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
struct pisp_dmy *pisp_dmy = to_pisp_dmy(sd);
|
|
mutex_destroy(&pisp_dmy->mutex);
|
|
pm_runtime_disable(&client->dev);
|
if (!pm_runtime_status_suspended(&client->dev))
|
__pisp_dmy_power_off(pisp_dmy);
|
pm_runtime_set_suspended(&client->dev);
|
|
return 0;
|
}
|
|
#if IS_ENABLED(CONFIG_OF)
|
static const struct of_device_id pisp_dmy_of_match[] = {
|
{ .compatible = "pisp_dmy" },
|
{},
|
};
|
MODULE_DEVICE_TABLE(of, pisp_dmy_of_match);
|
#endif
|
|
static const struct i2c_device_id pisp_dmy_match_id[] = {
|
{ "pisp_dmy", 0 },
|
{ },
|
};
|
|
static struct i2c_driver pisp_dmy_i2c_driver = {
|
.driver = {
|
.name = PISP_DMY_NAME,
|
.pm = &pisp_dmy_pm_ops,
|
.of_match_table = of_match_ptr(pisp_dmy_of_match),
|
},
|
.probe = &pisp_dmy_probe,
|
.remove = &pisp_dmy_remove,
|
.id_table = pisp_dmy_match_id,
|
};
|
|
static int __init sensor_mod_init(void)
|
{
|
return i2c_add_driver(&pisp_dmy_i2c_driver);
|
}
|
|
static void __exit sensor_mod_exit(void)
|
{
|
i2c_del_driver(&pisp_dmy_i2c_driver);
|
}
|
|
device_initcall_sync(sensor_mod_init);
|
module_exit(sensor_mod_exit);
|
|
MODULE_DESCRIPTION("preisp dummy sensor driver");
|
MODULE_LICENSE("GPL v2");
|
