/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef _I915_PERF_TYPES_H_
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#define _I915_PERF_TYPES_H_
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#include <linux/atomic.h>
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#include <linux/device.h>
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#include <linux/hrtimer.h>
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#include <linux/llist.h>
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#include <linux/poll.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/uuid.h>
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#include <linux/wait.h>
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#include "gt/intel_sseu.h"
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#include "i915_reg.h"
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#include "intel_wakeref.h"
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struct drm_i915_private;
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struct file;
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struct i915_active;
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struct i915_gem_context;
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struct i915_perf;
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struct i915_vma;
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struct intel_context;
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struct intel_engine_cs;
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struct i915_oa_format {
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u32 format;
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int size;
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};
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struct i915_oa_reg {
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i915_reg_t addr;
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u32 value;
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};
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struct i915_oa_config {
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struct i915_perf *perf;
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char uuid[UUID_STRING_LEN + 1];
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int id;
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const struct i915_oa_reg *mux_regs;
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u32 mux_regs_len;
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const struct i915_oa_reg *b_counter_regs;
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u32 b_counter_regs_len;
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const struct i915_oa_reg *flex_regs;
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u32 flex_regs_len;
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struct attribute_group sysfs_metric;
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struct attribute *attrs[2];
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struct kobj_attribute sysfs_metric_id;
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struct kref ref;
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struct rcu_head rcu;
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};
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struct i915_perf_stream;
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/**
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* struct i915_perf_stream_ops - the OPs to support a specific stream type
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*/
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struct i915_perf_stream_ops {
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/**
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* @enable: Enables the collection of HW samples, either in response to
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* `I915_PERF_IOCTL_ENABLE` or implicitly called when stream is opened
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* without `I915_PERF_FLAG_DISABLED`.
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*/
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void (*enable)(struct i915_perf_stream *stream);
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/**
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* @disable: Disables the collection of HW samples, either in response
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* to `I915_PERF_IOCTL_DISABLE` or implicitly called before destroying
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* the stream.
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*/
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void (*disable)(struct i915_perf_stream *stream);
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/**
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* @poll_wait: Call poll_wait, passing a wait queue that will be woken
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* once there is something ready to read() for the stream
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*/
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void (*poll_wait)(struct i915_perf_stream *stream,
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struct file *file,
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poll_table *wait);
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/**
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* @wait_unlocked: For handling a blocking read, wait until there is
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* something to ready to read() for the stream. E.g. wait on the same
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* wait queue that would be passed to poll_wait().
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*/
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int (*wait_unlocked)(struct i915_perf_stream *stream);
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/**
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* @read: Copy buffered metrics as records to userspace
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* **buf**: the userspace, destination buffer
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* **count**: the number of bytes to copy, requested by userspace
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* **offset**: zero at the start of the read, updated as the read
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* proceeds, it represents how many bytes have been copied so far and
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* the buffer offset for copying the next record.
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*
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* Copy as many buffered i915 perf samples and records for this stream
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* to userspace as will fit in the given buffer.
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*
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* Only write complete records; returning -%ENOSPC if there isn't room
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* for a complete record.
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*
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* Return any error condition that results in a short read such as
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* -%ENOSPC or -%EFAULT, even though these may be squashed before
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* returning to userspace.
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*/
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int (*read)(struct i915_perf_stream *stream,
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char __user *buf,
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size_t count,
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size_t *offset);
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/**
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* @destroy: Cleanup any stream specific resources.
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*
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* The stream will always be disabled before this is called.
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*/
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void (*destroy)(struct i915_perf_stream *stream);
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};
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/**
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* struct i915_perf_stream - state for a single open stream FD
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*/
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struct i915_perf_stream {
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/**
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* @perf: i915_perf backpointer
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*/
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struct i915_perf *perf;
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/**
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* @uncore: mmio access path
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*/
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struct intel_uncore *uncore;
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/**
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* @engine: Engine associated with this performance stream.
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*/
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struct intel_engine_cs *engine;
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/**
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* @sample_flags: Flags representing the `DRM_I915_PERF_PROP_SAMPLE_*`
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* properties given when opening a stream, representing the contents
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* of a single sample as read() by userspace.
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*/
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u32 sample_flags;
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/**
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* @sample_size: Considering the configured contents of a sample
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* combined with the required header size, this is the total size
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* of a single sample record.
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*/
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int sample_size;
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/**
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* @ctx: %NULL if measuring system-wide across all contexts or a
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* specific context that is being monitored.
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*/
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struct i915_gem_context *ctx;
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/**
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* @enabled: Whether the stream is currently enabled, considering
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* whether the stream was opened in a disabled state and based
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* on `I915_PERF_IOCTL_ENABLE` and `I915_PERF_IOCTL_DISABLE` calls.
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*/
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bool enabled;
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/**
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* @hold_preemption: Whether preemption is put on hold for command
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* submissions done on the @ctx. This is useful for some drivers that
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* cannot easily post process the OA buffer context to subtract delta
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* of performance counters not associated with @ctx.
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*/
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bool hold_preemption;
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/**
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* @ops: The callbacks providing the implementation of this specific
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* type of configured stream.
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*/
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const struct i915_perf_stream_ops *ops;
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/**
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* @oa_config: The OA configuration used by the stream.
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*/
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struct i915_oa_config *oa_config;
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/**
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* @oa_config_bos: A list of struct i915_oa_config_bo allocated lazily
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* each time @oa_config changes.
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*/
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struct llist_head oa_config_bos;
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/**
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* @pinned_ctx: The OA context specific information.
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*/
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struct intel_context *pinned_ctx;
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/**
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* @specific_ctx_id: The id of the specific context.
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*/
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u32 specific_ctx_id;
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/**
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* @specific_ctx_id_mask: The mask used to masking specific_ctx_id bits.
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*/
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u32 specific_ctx_id_mask;
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/**
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* @poll_check_timer: High resolution timer that will periodically
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* check for data in the circular OA buffer for notifying userspace
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* (e.g. during a read() or poll()).
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*/
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struct hrtimer poll_check_timer;
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/**
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* @poll_wq: The wait queue that hrtimer callback wakes when it
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* sees data ready to read in the circular OA buffer.
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*/
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wait_queue_head_t poll_wq;
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/**
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* @pollin: Whether there is data available to read.
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*/
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bool pollin;
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/**
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* @periodic: Whether periodic sampling is currently enabled.
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*/
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bool periodic;
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/**
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* @period_exponent: The OA unit sampling frequency is derived from this.
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*/
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int period_exponent;
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/**
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* @oa_buffer: State of the OA buffer.
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*/
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struct {
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struct i915_vma *vma;
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u8 *vaddr;
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u32 last_ctx_id;
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int format;
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int format_size;
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int size_exponent;
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/**
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* @ptr_lock: Locks reads and writes to all head/tail state
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*
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* Consider: the head and tail pointer state needs to be read
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* consistently from a hrtimer callback (atomic context) and
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* read() fop (user context) with tail pointer updates happening
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* in atomic context and head updates in user context and the
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* (unlikely) possibility of read() errors needing to reset all
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* head/tail state.
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*
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* Note: Contention/performance aren't currently a significant
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* concern here considering the relatively low frequency of
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* hrtimer callbacks (5ms period) and that reads typically only
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* happen in response to a hrtimer event and likely complete
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* before the next callback.
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*
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* Note: This lock is not held *while* reading and copying data
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* to userspace so the value of head observed in htrimer
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* callbacks won't represent any partial consumption of data.
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*/
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spinlock_t ptr_lock;
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/**
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* @aging_tail: The last HW tail reported by HW. The data
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* might not have made it to memory yet though.
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*/
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u32 aging_tail;
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/**
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* @aging_timestamp: A monotonic timestamp for when the current aging tail pointer
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* was read; used to determine when it is old enough to trust.
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*/
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u64 aging_timestamp;
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/**
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* @head: Although we can always read back the head pointer register,
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* we prefer to avoid trusting the HW state, just to avoid any
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* risk that some hardware condition could * somehow bump the
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* head pointer unpredictably and cause us to forward the wrong
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* OA buffer data to userspace.
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*/
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u32 head;
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/**
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* @tail: The last verified tail that can be read by userspace.
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*/
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u32 tail;
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} oa_buffer;
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/**
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* @noa_wait: A batch buffer doing a wait on the GPU for the NOA logic to be
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* reprogrammed.
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*/
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struct i915_vma *noa_wait;
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/**
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* @poll_oa_period: The period in nanoseconds at which the OA
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* buffer should be checked for available data.
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*/
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u64 poll_oa_period;
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};
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/**
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* struct i915_oa_ops - Gen specific implementation of an OA unit stream
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*/
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struct i915_oa_ops {
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/**
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* @is_valid_b_counter_reg: Validates register's address for
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* programming boolean counters for a particular platform.
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*/
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bool (*is_valid_b_counter_reg)(struct i915_perf *perf, u32 addr);
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/**
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* @is_valid_mux_reg: Validates register's address for programming mux
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* for a particular platform.
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*/
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bool (*is_valid_mux_reg)(struct i915_perf *perf, u32 addr);
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/**
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* @is_valid_flex_reg: Validates register's address for programming
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* flex EU filtering for a particular platform.
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*/
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bool (*is_valid_flex_reg)(struct i915_perf *perf, u32 addr);
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/**
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* @enable_metric_set: Selects and applies any MUX configuration to set
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* up the Boolean and Custom (B/C) counters that are part of the
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* counter reports being sampled. May apply system constraints such as
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* disabling EU clock gating as required.
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*/
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int (*enable_metric_set)(struct i915_perf_stream *stream,
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struct i915_active *active);
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/**
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* @disable_metric_set: Remove system constraints associated with using
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* the OA unit.
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*/
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void (*disable_metric_set)(struct i915_perf_stream *stream);
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/**
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* @oa_enable: Enable periodic sampling
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*/
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void (*oa_enable)(struct i915_perf_stream *stream);
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/**
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* @oa_disable: Disable periodic sampling
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*/
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void (*oa_disable)(struct i915_perf_stream *stream);
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/**
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* @read: Copy data from the circular OA buffer into a given userspace
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* buffer.
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*/
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int (*read)(struct i915_perf_stream *stream,
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char __user *buf,
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size_t count,
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size_t *offset);
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/**
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* @oa_hw_tail_read: read the OA tail pointer register
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*
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* In particular this enables us to share all the fiddly code for
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* handling the OA unit tail pointer race that affects multiple
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* generations.
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*/
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u32 (*oa_hw_tail_read)(struct i915_perf_stream *stream);
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};
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struct i915_perf {
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struct drm_i915_private *i915;
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struct kobject *metrics_kobj;
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/*
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* Lock associated with adding/modifying/removing OA configs
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* in perf->metrics_idr.
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*/
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struct mutex metrics_lock;
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/*
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* List of dynamic configurations (struct i915_oa_config), you
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* need to hold perf->metrics_lock to access it.
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*/
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struct idr metrics_idr;
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/*
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* Lock associated with anything below within this structure
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* except exclusive_stream.
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*/
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struct mutex lock;
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/*
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* The stream currently using the OA unit. If accessed
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* outside a syscall associated to its file
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* descriptor.
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*/
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struct i915_perf_stream *exclusive_stream;
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/**
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* @sseu: sseu configuration selected to run while perf is active,
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* applies to all contexts.
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*/
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struct intel_sseu sseu;
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/**
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* For rate limiting any notifications of spurious
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* invalid OA reports
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*/
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struct ratelimit_state spurious_report_rs;
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/**
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* For rate limiting any notifications of tail pointer
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* race.
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*/
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struct ratelimit_state tail_pointer_race;
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u32 gen7_latched_oastatus1;
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u32 ctx_oactxctrl_offset;
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u32 ctx_flexeu0_offset;
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/**
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* The RPT_ID/reason field for Gen8+ includes a bit
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* to determine if the CTX ID in the report is valid
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* but the specific bit differs between Gen 8 and 9
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*/
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u32 gen8_valid_ctx_bit;
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struct i915_oa_ops ops;
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const struct i915_oa_format *oa_formats;
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atomic64_t noa_programming_delay;
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};
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#endif /* _I915_PERF_TYPES_H_ */
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