/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_RESET_TYPES_H_
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#define __INTEL_RESET_TYPES_H_
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#include <linux/mutex.h>
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#include <linux/wait.h>
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#include <linux/srcu.h>
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struct intel_reset {
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/**
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* flags: Control various stages of the GPU reset
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*
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* #I915_RESET_BACKOFF - When we start a global reset, we need to
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* serialise with any other users attempting to do the same, and
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* any global resources that may be clobber by the reset (such as
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* FENCE registers).
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*
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* #I915_RESET_ENGINE[num_engines] - Since the driver doesn't need to
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* acquire the struct_mutex to reset an engine, we need an explicit
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* flag to prevent two concurrent reset attempts in the same engine.
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* As the number of engines continues to grow, allocate the flags from
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* the most significant bits.
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*
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* #I915_WEDGED - If reset fails and we can no longer use the GPU,
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* we set the #I915_WEDGED bit. Prior to command submission, e.g.
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* i915_request_alloc(), this bit is checked and the sequence
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* aborted (with -EIO reported to userspace) if set.
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*
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* #I915_WEDGED_ON_INIT - If we fail to initialize the GPU we can no
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* longer use the GPU - similar to #I915_WEDGED bit. The difference in
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* in the way we're handling "forced" unwedged (e.g. through debugfs),
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* which is not allowed in case we failed to initialize.
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*
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* #I915_WEDGED_ON_FINI - Similar to #I915_WEDGED_ON_INIT, except we
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* use it to mark that the GPU is no longer available (and prevent
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* users from using it).
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*/
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unsigned long flags;
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#define I915_RESET_BACKOFF 0
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#define I915_RESET_MODESET 1
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#define I915_RESET_ENGINE 2
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#define I915_WEDGED_ON_INIT (BITS_PER_LONG - 3)
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#define I915_WEDGED_ON_FINI (BITS_PER_LONG - 2)
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#define I915_WEDGED (BITS_PER_LONG - 1)
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struct mutex mutex; /* serialises wedging/unwedging */
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/**
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* Waitqueue to signal when the reset has completed. Used by clients
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* that wait for dev_priv->mm.wedged to settle.
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*/
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wait_queue_head_t queue;
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struct srcu_struct backoff_srcu;
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};
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#endif /* _INTEL_RESET_TYPES_H_ */
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