/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) Rockchip Electronics Co.Ltd
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* Author:
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* Algea Cao <algea.cao@rock-chips.com>
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*/
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#ifndef DW_HDMI_QP_HDCP_H
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#define DW_HDMI_QP_HDCP_H
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#include <linux/miscdevice.h>
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#define DW_HDCP_QP_DRIVER_NAME "dw-hdmi-qp-hdcp"
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#define PRIVATE_KEY_SIZE 280
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#define KEY_SHA_SIZE 20
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#define KSV_LEN 5
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#define BSTATUS_LEN 2
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#define M0_LEN 8
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#define SHAMAX 20
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struct dw_hdmi_qp_hdcp_keys {
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u8 KSV[8];
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u8 devicekey[PRIVATE_KEY_SIZE];
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u8 sha1[KEY_SHA_SIZE];
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};
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struct dw_qp_hdcp {
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int retry_times;
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int remaining_times;
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char *seeds;
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int invalidkey;
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char *invalidkeys;
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int hdcp2_enable;
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int status;
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u32 reg_io_width;
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struct dw_hdmi_qp_hdcp_keys *keys;
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struct device *dev;
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struct dw_hdmi_qp *hdmi;
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void __iomem *regs;
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struct mutex mutex;
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struct work_struct work;
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struct workqueue_struct *workqueue;
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void (*write)(struct dw_hdmi_qp *hdmi, u32 val, int offset);
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u32 (*read)(struct dw_hdmi_qp *hdmi, int offset);
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void (*get_mem)(struct dw_hdmi_qp *hdmi, u8 *data, u32 len);
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int (*hdcp_start)(struct dw_qp_hdcp *hdcp);
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int (*hdcp_stop)(struct dw_qp_hdcp *hdcp);
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void (*hdcp_isr)(struct dw_qp_hdcp *hdcp, u32 avp_int, u32 hdcp_status);
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};
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#endif
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