// SPDX-License-Identifier: GPL-2.0
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/*
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* Maxim max96755f GMSL2 Serializer with MIPI-DSI Input
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*
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* Copyright (c) 2022 Rockchip Electronics Co. Ltd.
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_print.h>
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#include <drm/drm_of.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_probe_helper.h>
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#include <linux/gpio/consumer.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/extcon-provider.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <drm/drm_mipi_dsi.h>
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#include <linux/mfd/max96755f.h>
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struct max96755f_bridge {
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struct drm_bridge bridge;
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struct drm_bridge *next_bridge;
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struct drm_connector connector;
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struct drm_panel *panel;
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struct device *dev;
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struct max96755f *parent;
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struct regmap *regmap;
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struct mipi_dsi_device *dsi;
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struct device_node *dsi_node;
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struct drm_display_mode mode;
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u32 num_lanes;
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bool dv_swp_ab;
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bool dpi_deskew_en;
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bool split_mode;
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bool bridge_dual_link;
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u32 dsi_lane_map[4];
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struct {
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struct gpio_desc *gpio;
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int irq;
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bool irq_enabled;
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atomic_t triggered;
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} lock;
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};
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#define to_max96755f_bridge(x) container_of(x, struct max96755f_bridge, x)
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static int max96755f_bridge_connector_get_modes(struct drm_connector *connector)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(connector);
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if (ser->next_bridge)
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return drm_bridge_get_modes(ser->next_bridge, connector);
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return drm_panel_get_modes(ser->panel, connector);
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}
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static const struct drm_connector_helper_funcs
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max96755f_bridge_connector_helper_funcs = {
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.get_modes = max96755f_bridge_connector_get_modes,
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};
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static enum drm_connector_status
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max96755f_bridge_connector_detect(struct drm_connector *connector, bool force)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(connector);
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if (!drm_kms_helper_is_poll_worker())
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return connector->status;
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return drm_bridge_detect(&ser->bridge);
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}
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static const struct drm_connector_funcs max96755f_bridge_connector_funcs = {
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.reset = drm_atomic_helper_connector_reset,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.detect = max96755f_bridge_connector_detect,
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.destroy = drm_connector_cleanup,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static struct mipi_dsi_device *max96755f_attach_dsi(struct max96755f_bridge *max96755f,
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struct device_node *dsi_node)
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{
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const struct mipi_dsi_device_info info = { "max96755f", 0, NULL };
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struct mipi_dsi_device *dsi;
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struct mipi_dsi_host *host;
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int ret;
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host = of_find_mipi_dsi_host_by_node(dsi_node);
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if (!host) {
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dev_err(max96755f->dev, "failed to find dsi host\n");
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return ERR_PTR(-EPROBE_DEFER);
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}
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dsi = mipi_dsi_device_register_full(host, &info);
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if (IS_ERR(dsi)) {
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dev_err(max96755f->dev, "failed to create dsi device\n");
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return dsi;
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}
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dsi->lanes = max96755f->num_lanes;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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dev_err(max96755f->dev, "failed to attach dsi to host\n");
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mipi_dsi_device_unregister(dsi);
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return ERR_PTR(ret);
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}
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return dsi;
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}
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static bool max96755f_bridge_link_locked(struct max96755f_bridge *ser)
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{
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u32 val;
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if (regmap_read(ser->regmap, 0x0013, &val))
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return false;
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if (!FIELD_GET(LOCKED, val))
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return false;
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return true;
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}
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static int max96755f_bridge_attach(struct drm_bridge *bridge,
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enum drm_bridge_attach_flags flags)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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struct drm_connector *connector = &ser->connector;
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int ret;
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ret = drm_of_find_panel_or_bridge(bridge->of_node, 1, -1, &ser->panel,
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&ser->next_bridge);
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if (ret)
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return ret;
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if (ser->next_bridge) {
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ret = drm_bridge_attach(bridge->encoder, ser->next_bridge,
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bridge, DRM_BRIDGE_ATTACH_NO_CONNECTOR);
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if (ret)
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return ret;
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}
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connector->polled = DRM_CONNECTOR_POLL_CONNECT |
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DRM_CONNECTOR_POLL_DISCONNECT;
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drm_connector_helper_add(connector,
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&max96755f_bridge_connector_helper_funcs);
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ret = drm_connector_init(bridge->dev, connector,
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&max96755f_bridge_connector_funcs,
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ser->next_bridge ? ser->next_bridge->type : bridge->type);
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if (ret) {
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DRM_ERROR("Failed to initialize connector\n");
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return ret;
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}
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if (max96755f_bridge_link_locked(ser)) {
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connector->status = connector_status_connected;
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enable_irq(ser->lock.irq);
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ser->lock.irq_enabled = true;
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} else {
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connector->status = connector_status_disconnected;
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}
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drm_connector_attach_encoder(connector, bridge->encoder);
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ser->dsi = max96755f_attach_dsi(ser, ser->dsi_node);
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if (IS_ERR(ser->dsi))
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return PTR_ERR(ser->dsi);
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return 0;
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}
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static void max96755f_bridge_detach(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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if (ser->dsi) {
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mipi_dsi_detach(ser->dsi);
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mipi_dsi_device_unregister(ser->dsi);
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}
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}
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static void max96755f_mipi_dsi_rx_config(struct max96755f_bridge *ser)
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{
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struct drm_display_mode *mode = &ser->mode;
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u32 hfp, hsa, hbp, hact;
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u32 vact, vsa, vfp, vbp;
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u8 lane_map;
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regmap_update_bits(ser->regmap, 0x330, MIPI_RX_RESET,
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FIELD_PREP(MIPI_RX_RESET, 1));
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mdelay(10);
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regmap_update_bits(ser->regmap, 0x330, MIPI_RX_RESET,
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FIELD_PREP(MIPI_RX_RESET, 0));
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mdelay(10);
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regmap_update_bits(ser->regmap, 0x331, NUM_LANES,
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FIELD_PREP(NUM_LANES, ser->num_lanes - 1));
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lane_map = (ser->dsi_lane_map[0] & 0xff) << 4 |
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(ser->dsi_lane_map[1] & 0xff) << 6 |
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(ser->dsi_lane_map[2] & 0xff) << 0 |
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(ser->dsi_lane_map[3] & 0xff) << 2;
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regmap_write(ser->regmap, 0x332, lane_map);
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if (!ser->dpi_deskew_en)
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return;
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vact = mode->vdisplay;
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vsa = mode->vsync_end - mode->vsync_start;
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vfp = mode->vsync_start - mode->vdisplay;
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vbp = mode->vtotal - mode->vsync_end;
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hact = mode->hdisplay;
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hsa = mode->hsync_end - mode->hsync_start;
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hfp = mode->hsync_start - mode->hdisplay;
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hbp = mode->htotal - mode->hsync_end;
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regmap_write(ser->regmap, 0x03A4, 0xc1);
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regmap_write(ser->regmap, 0x0385, FIELD_PREP(DPI_HSYNC_WIDTH_L, hsa));
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regmap_write(ser->regmap, 0x0386, FIELD_PREP(DPI_VYSNC_WIDTH_L, vsa));
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regmap_write(ser->regmap, 0x0387,
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FIELD_PREP(DPI_VSYNC_WIDTH_H, (vsa >> 8)) |
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FIELD_PREP(DPI_HSYNC_WIDTH_H, (hsa >> 8)));
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regmap_write(ser->regmap, 0x03a5, FIELD_PREP(DPI_VFP_L, vfp));
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regmap_write(ser->regmap, 0x03a6,
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FIELD_PREP(DPI_VBP_L, vbp) |
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FIELD_PREP(DPI_VFP_H, (vfp >> 8)));
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regmap_write(ser->regmap, 0x03a7, FIELD_PREP(DPI_VBP_H, (vbp >> 4)));
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regmap_write(ser->regmap, 0x03a8, FIELD_PREP(DPI_VACT_L, vact));
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regmap_write(ser->regmap, 0x03a9, FIELD_PREP(DPI_VACT_H, (vact >> 8)));
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regmap_write(ser->regmap, 0x03aa, FIELD_PREP(DPI_HFP_L, hfp));
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regmap_write(ser->regmap, 0x03ab,
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FIELD_PREP(DPI_HBP_L, hbp) |
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FIELD_PREP(DPI_HFP_H, (hfp >> 7)));
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regmap_write(ser->regmap, 0x03ac, FIELD_PREP(DPI_HBP_H, (hbp >> 4)));
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regmap_write(ser->regmap, 0x03ad, FIELD_PREP(DPI_HACT_L, hact));
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regmap_write(ser->regmap, 0x03ae, FIELD_PREP(DPI_HACT_H, (hact >> 8)));
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}
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static void max96755f_bridge_pre_enable(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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max96755f_mipi_dsi_rx_config(ser);
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if (ser->split_mode) {
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regmap_update_bits(ser->regmap, 0x0053,
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TX_SPLIT_MASK_B | TX_SPLIT_MASK_A | TX_STR_SEL,
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FIELD_PREP(TX_SPLIT_MASK_B, 0) |
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FIELD_PREP(TX_SPLIT_MASK_A, 1) |
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FIELD_PREP(TX_STR_SEL, 0));
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regmap_update_bits(ser->regmap, 0x0057,
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TX_SPLIT_MASK_B | TX_SPLIT_MASK_A | TX_STR_SEL,
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FIELD_PREP(TX_SPLIT_MASK_B, 1) |
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FIELD_PREP(TX_SPLIT_MASK_A, 0) |
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FIELD_PREP(TX_STR_SEL, 1));
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regmap_update_bits(ser->regmap, 0x032a,
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DV_SWP_AB | DV_CONV | DV_SPL | DV_EN,
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FIELD_PREP(DV_SWP_AB, ser->dv_swp_ab) |
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FIELD_PREP(DV_CONV, 1) |
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FIELD_PREP(DV_SPL, 1) |
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FIELD_PREP(DV_EN, 1));
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}
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if (ser->panel)
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drm_panel_prepare(ser->panel);
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}
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static void max96755f_bridge_reset_oneshot(struct max96755f_bridge *ser)
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{
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regmap_update_bits(ser->regmap, 0x0010, RESET_ONESHOT,
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FIELD_PREP(RESET_ONESHOT, 1));
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mdelay(100);
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/* One-Shot Link Reset will trigger lock interrupt */
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atomic_set(&ser->lock.triggered, 0);
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}
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static void max96755f_bridge_enable(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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struct max96755f *max96755f = ser->parent;
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u32 val;
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int ret;
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if (ser->split_mode) {
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regmap_update_bits(ser->regmap, 0x0311,
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START_PORTAX | START_PORTAY,
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FIELD_PREP(START_PORTAX, 1) |
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FIELD_PREP(START_PORTAY, 1));
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regmap_update_bits(ser->regmap, 0x0002,
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VID_TX_EN_X | VID_TX_EN_Y,
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FIELD_PREP(VID_TX_EN_X, 1) |
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FIELD_PREP(VID_TX_EN_Y, 1));
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regmap_update_bits(ser->regmap, 0x0010,
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AUTO_LINK | LINK_CFG,
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FIELD_PREP(AUTO_LINK, 0) |
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FIELD_PREP(LINK_CFG, SPLITTER_MODE));
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ret = regmap_read_poll_timeout(ser->regmap, 0x0013, val,
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val & LOCKED, 100,
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50 * USEC_PER_MSEC);
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if (ret < 0)
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dev_err(ser->dev, "GMSL2 link lock timeout\n");
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} else {
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regmap_update_bits(ser->regmap, 0x0311,
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START_PORTAX | START_PORTAY,
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FIELD_PREP(START_PORTAX, 1) |
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FIELD_PREP(START_PORTAY, 1));
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regmap_update_bits(ser->regmap, 0x02, VID_TX_EN_X,
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FIELD_PREP(VID_TX_EN_X, 1));
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if (ser->bridge_dual_link) {
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regmap_update_bits(ser->regmap, 0x0010,
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AUTO_LINK | LINK_CFG,
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FIELD_PREP(AUTO_LINK, 0) |
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FIELD_PREP(LINK_CFG, DUAL_LINK));
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}
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}
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max96755f_bridge_reset_oneshot(ser);
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if (ser->panel)
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drm_panel_enable(ser->panel);
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if (!ser->lock.irq_enabled) {
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enable_irq(ser->lock.irq);
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ser->lock.irq_enabled = true;
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}
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extcon_set_state_sync(max96755f->extcon, EXTCON_JACK_VIDEO_OUT, true);
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}
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static void max96755f_bridge_disable(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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struct max96755f *max96755f = ser->parent;
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extcon_set_state_sync(max96755f->extcon, EXTCON_JACK_VIDEO_OUT, false);
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if (ser->lock.irq_enabled) {
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disable_irq(ser->lock.irq);
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ser->lock.irq_enabled = false;
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}
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if (ser->panel)
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drm_panel_disable(ser->panel);
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regmap_update_bits(ser->regmap, 0x02, VID_TX_EN_X | VID_TX_EN_Y,
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FIELD_PREP(VID_TX_EN_X, 0) |
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FIELD_PREP(VID_TX_EN_Y, 0));
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if (ser->split_mode || ser->bridge_dual_link)
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regmap_update_bits(ser->regmap, 0x0010,
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AUTO_LINK | LINK_CFG,
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FIELD_PREP(AUTO_LINK, 1) |
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FIELD_PREP(LINK_CFG, LINKA));
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}
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static void max96755f_bridge_post_disable(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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if (ser->panel)
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drm_panel_unprepare(ser->panel);
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}
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static enum drm_connector_status
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max96755f_bridge_detect(struct drm_bridge *bridge)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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struct max96755f *max96755f = ser->parent;
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if (!max96755f_bridge_link_locked(ser))
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return connector_status_disconnected;
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if (extcon_get_state(max96755f->extcon, EXTCON_JACK_VIDEO_OUT)) {
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if (atomic_cmpxchg(&ser->lock.triggered, 1, 0))
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return connector_status_disconnected;
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} else {
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atomic_set(&ser->lock.triggered, 0);
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}
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if (ser->next_bridge && (ser->next_bridge->ops & DRM_BRIDGE_OP_DETECT))
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return drm_bridge_detect(ser->next_bridge);
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return connector_status_connected;
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}
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static void max96755f_bridge_mode_set(struct drm_bridge *bridge,
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const struct drm_display_mode *mode,
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const struct drm_display_mode *adj_mode)
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{
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struct max96755f_bridge *ser = to_max96755f_bridge(bridge);
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drm_mode_copy(&ser->mode, adj_mode);
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}
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static const struct drm_bridge_funcs max96755f_bridge_funcs = {
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.attach = max96755f_bridge_attach,
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.detach = max96755f_bridge_detach,
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.detect = max96755f_bridge_detect,
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.pre_enable = max96755f_bridge_pre_enable,
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.enable = max96755f_bridge_enable,
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.disable = max96755f_bridge_disable,
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.post_disable = max96755f_bridge_post_disable,
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.mode_set = max96755f_bridge_mode_set,
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.atomic_get_input_bus_fmts = drm_atomic_helper_bridge_propagate_bus_fmt,
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.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
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.atomic_reset = drm_atomic_helper_bridge_reset,
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};
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static int max96755f_link_parse(struct max96755f_bridge *ser)
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{
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struct device *dev = ser->dev;
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struct device_node *np = dev->of_node;
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struct device *parent = dev->parent;
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struct device_node *child;
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u32 val;
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int ret = 0;
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unsigned int nr = 0;
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int i, len;
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ser->dpi_deskew_en = of_property_read_bool(np, "dpi-deskew-en");
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ser->dv_swp_ab = of_property_read_bool(np, "vd-swap-ab");
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if (!of_property_read_u32(np, "dsi,lanes", &val))
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ser->num_lanes = val;
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else
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ser->num_lanes = 4;
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for (i = 0; i < ser->num_lanes; i++)
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ser->dsi_lane_map[i] = i;
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if (of_find_property(np, "maxim,dsi-lane-map", &len)) {
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len /= sizeof(u32);
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if (ser->num_lanes != len) {
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dev_err(dev, "invalid number of lane map\n");
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return -EINVAL;
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}
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ret = of_property_read_u32_array(np, "maxim,dsi-lane-map",
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ser->dsi_lane_map, len);
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if (ret) {
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dev_err(dev, "get dsi lane map failed\n");
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return -EINVAL;
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}
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}
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for_each_available_child_of_node(parent->of_node, child) {
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if (!of_find_property(child, "reg", NULL))
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continue;
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nr++;
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}
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switch (nr) {
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case 2:
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ser->split_mode = true;
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case 1:
|
break;
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default:
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ret = -EINVAL;
|
}
|
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return ret;
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}
|
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static irqreturn_t max96755f_bridge_lock_irq_handler(int irq, void *arg)
|
{
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struct max96755f_bridge *ser = arg;
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atomic_set(&ser->lock.triggered, 1);
|
|
return IRQ_HANDLED;
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}
|
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static int max96755f_bridge_probe(struct platform_device *pdev)
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{
|
struct device *dev = &pdev->dev;
|
struct device_node *np = dev->of_node;
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struct max96755f_bridge *ser;
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int ret;
|
|
ser = devm_kzalloc(dev, sizeof(*ser), GFP_KERNEL);
|
if (!ser)
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return -ENOMEM;
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ser->dev = dev;
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ser->parent = dev_get_drvdata(dev->parent);
|
platform_set_drvdata(pdev, ser);
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ser->regmap = dev_get_regmap(dev->parent, NULL);
|
if (!ser->regmap)
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return dev_err_probe(dev, -ENODEV, "failed to get regmap\n");
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ser->dsi_node = of_graph_get_remote_node(dev->of_node, 0, -1);
|
if (!ser->dsi_node) {
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dev_err(ser->dev, "failed to get remote node for primary dsi\n");
|
return -ENODEV;
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}
|
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ret = max96755f_link_parse(ser);
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if (ret)
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dev_err_probe(dev, ret, "failed to parse link\n");
|
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ser->lock.gpio = devm_gpiod_get(dev, "lock", GPIOD_IN);
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if (IS_ERR(ser->lock.gpio))
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return dev_err_probe(dev, PTR_ERR(ser->lock.gpio),
|
"failed to get lock GPIO\n");
|
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ser->lock.irq = gpiod_to_irq(ser->lock.gpio);
|
if (ser->lock.irq < 0)
|
return ser->lock.irq;
|
|
irq_set_status_flags(ser->lock.irq, IRQ_NOAUTOEN);
|
ret = devm_request_threaded_irq(dev, ser->lock.irq, NULL,
|
max96755f_bridge_lock_irq_handler,
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
|
dev_name(dev), ser);
|
if (ret)
|
return dev_err_probe(dev, ret, "failed to request lock IRQ\n");
|
|
ser->bridge_dual_link = of_property_read_bool(np, "bridge_dual_link");
|
|
ser->bridge.funcs = &max96755f_bridge_funcs;
|
ser->bridge.of_node = dev->of_node;
|
ser->bridge.ops = DRM_BRIDGE_OP_DETECT;
|
ser->bridge.type = DRM_MODE_CONNECTOR_LVDS;
|
|
drm_bridge_add(&ser->bridge);
|
|
return 0;
|
}
|
|
static int max96755f_bridge_remove(struct platform_device *pdev)
|
{
|
struct max96755f_bridge *ser = platform_get_drvdata(pdev);
|
|
drm_bridge_remove(&ser->bridge);
|
|
return 0;
|
}
|
|
static const struct of_device_id max96755f_bridge_of_match[] = {
|
{ .compatible = "maxim,max96755f-bridge", },
|
{}
|
};
|
MODULE_DEVICE_TABLE(of, max96755f_bridge_of_match);
|
|
static struct platform_driver max96755f_bridge_driver = {
|
.driver = {
|
.name = "max96755f-bridge",
|
.of_match_table = of_match_ptr(max96755f_bridge_of_match),
|
},
|
.probe = max96755f_bridge_probe,
|
.remove = max96755f_bridge_remove,
|
};
|
|
module_platform_driver(max96755f_bridge_driver);
|
|
MODULE_AUTHOR("Guochun Huang <hero.hunag@rock-chips.com>");
|
MODULE_DESCRIPTION("Maxim max96755f GMSL2 Serializer with MIPI-DSI Input");
|
MODULE_LICENSE("GPL");
|
