// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd
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*/
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/pm_clock.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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struct rockchip_link_info {
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u32 shift;
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const char *name;
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const char *pname;
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};
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struct rockchip_link {
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int num;
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const struct rockchip_link_info *info;
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};
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struct rockchip_link_clk {
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void __iomem *base;
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struct clk_gate *gate;
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spinlock_t lock;
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u32 shift;
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u32 flag;
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const char *name;
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const char *pname;
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const char *link_name;
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const struct rockchip_link *link;
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};
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#define GFLAGS (CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE)
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#define GATE_LINK(_name, _pname, _shift) \
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{ \
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.name = _name, \
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.pname = _pname, \
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.shift = (_shift), \
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}
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static int register_clocks(struct rockchip_link_clk *priv, struct device *dev)
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{
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struct clk_gate *gate;
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struct clk_init_data init = {};
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struct clk *clk;
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gate = devm_kzalloc(dev, sizeof(struct clk_gate), GFP_KERNEL);
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if (!gate)
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return -ENOMEM;
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init.name = priv->name;
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init.ops = &clk_gate_ops;
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init.flags |= CLK_SET_RATE_PARENT;
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init.parent_names = &priv->pname;
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init.num_parents = 1;
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/* struct clk_gate assignments */
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gate->reg = priv->base;
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gate->bit_idx = priv->shift;
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gate->flags = GFLAGS;
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gate->lock = &priv->lock;
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gate->hw.init = &init;
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clk = devm_clk_register(dev, &gate->hw);
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if (IS_ERR(clk))
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return -EINVAL;
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return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, clk);
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}
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static const struct rockchip_link_info rk3562_clk_gate_link_info[] = {
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GATE_LINK("aclk_rga_jdec", "aclk_rga_pre", 3),
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GATE_LINK("aclk_vdpu", "aclk_vdpu_pre", 5),
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GATE_LINK("aclk_vepu", "aclk_vepu_pre", 3),
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GATE_LINK("aclk_vi_isp", "aclk_vi", 3),
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GATE_LINK("aclk_vo", "aclk_vo_pre", 3),
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GATE_LINK("hclk_vepu", "hclk_vepu_pre", 4),
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};
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static const struct rockchip_link rk3562_clk_gate_link = {
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.num = ARRAY_SIZE(rk3562_clk_gate_link_info),
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.info = rk3562_clk_gate_link_info,
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};
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static const struct rockchip_link_info rk3588_clk_gate_link_info[] = {
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GATE_LINK("aclk_isp1_pre", "aclk_isp1_root", 6),
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GATE_LINK("hclk_isp1_pre", "hclk_isp1_root", 8),
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GATE_LINK("hclk_nvm", "hclk_nvm_root", 2),
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GATE_LINK("aclk_usb", "aclk_usb_root", 2),
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GATE_LINK("hclk_usb", "hclk_usb_root", 3),
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GATE_LINK("aclk_jpeg_decoder_pre", "aclk_jpeg_decoder_root", 7),
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GATE_LINK("aclk_vdpu_low_pre", "aclk_vdpu_low_root", 5),
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GATE_LINK("aclk_rkvenc1_pre", "aclk_rkvenc1_root", 3),
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GATE_LINK("hclk_rkvenc1_pre", "hclk_rkvenc1_root", 2),
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GATE_LINK("hclk_rkvdec0_pre", "hclk_rkvdec0_root", 5),
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GATE_LINK("aclk_rkvdec0_pre", "aclk_rkvdec0_root", 6),
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GATE_LINK("hclk_rkvdec1_pre", "hclk_rkvdec1_root", 4),
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GATE_LINK("aclk_rkvdec1_pre", "aclk_rkvdec1_root", 5),
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GATE_LINK("aclk_hdcp0_pre", "aclk_vo0_root", 9),
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GATE_LINK("hclk_vo0", "hclk_vo0_root", 5),
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GATE_LINK("aclk_hdcp1_pre", "aclk_hdcp1_root", 6),
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GATE_LINK("hclk_vo1", "hclk_vo1_root", 9),
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GATE_LINK("aclk_av1_pre", "aclk_av1_root", 1),
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GATE_LINK("pclk_av1_pre", "pclk_av1_root", 4),
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GATE_LINK("hclk_sdio_pre", "hclk_sdio_root", 1),
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GATE_LINK("pclk_vo0_grf", "pclk_vo0_root", 10),
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GATE_LINK("pclk_vo1_grf", "pclk_vo1_root", 12),
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};
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static const struct rockchip_link rk3588_clk_gate_link = {
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.num = ARRAY_SIZE(rk3588_clk_gate_link_info),
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.info = rk3588_clk_gate_link_info,
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};
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static const struct of_device_id rockchip_clk_link_of_match[] = {
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{
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.compatible = "rockchip,rk3562-clock-gate-link",
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.data = (void *)&rk3562_clk_gate_link,
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},
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{
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.compatible = "rockchip,rk3588-clock-gate-link",
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.data = (void *)&rk3588_clk_gate_link,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, rockchip_clk_link_of_match);
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static const struct rockchip_link_info *
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rockchip_get_link_infos(const struct rockchip_link *link, const char *name)
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{
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const struct rockchip_link_info *info = link->info;
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int i = 0;
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for (i = 0; i < link->num; i++) {
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if (strcmp(info->name, name) == 0)
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break;
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info++;
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}
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return info;
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}
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static int rockchip_clk_link_probe(struct platform_device *pdev)
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{
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struct rockchip_link_clk *priv;
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struct device_node *node = pdev->dev.of_node;
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const struct of_device_id *match;
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const char *clk_name;
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const struct rockchip_link_info *link_info;
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int ret;
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match = of_match_node(rockchip_clk_link_of_match, node);
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if (!match)
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return -ENXIO;
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priv = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_link_clk),
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GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->link = match->data;
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spin_lock_init(&priv->lock);
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platform_set_drvdata(pdev, priv);
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priv->base = of_iomap(node, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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if (of_property_read_string(node, "clock-output-names", &clk_name))
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priv->name = node->name;
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else
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priv->name = clk_name;
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link_info = rockchip_get_link_infos(priv->link, priv->name);
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priv->shift = link_info->shift;
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priv->pname = link_info->pname;
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pm_runtime_enable(&pdev->dev);
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ret = pm_clk_create(&pdev->dev);
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if (ret)
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goto disable_pm_runtime;
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ret = pm_clk_add(&pdev->dev, "link");
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if (ret)
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goto destroy_pm_clk;
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ret = register_clocks(priv, &pdev->dev);
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if (ret)
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goto destroy_pm_clk;
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return 0;
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destroy_pm_clk:
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pm_clk_destroy(&pdev->dev);
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disable_pm_runtime:
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pm_runtime_disable(&pdev->dev);
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return ret;
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}
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static int rockchip_clk_link_remove(struct platform_device *pdev)
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{
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pm_clk_destroy(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static const struct dev_pm_ops rockchip_clk_link_pm_ops = {
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SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
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};
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static struct platform_driver rockchip_clk_link_driver = {
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.driver = {
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.name = "clock-link",
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.of_match_table = of_match_ptr(rockchip_clk_link_of_match),
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.pm = &rockchip_clk_link_pm_ops,
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},
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.probe = rockchip_clk_link_probe,
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.remove = rockchip_clk_link_remove,
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};
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static int __init rockchip_clk_link_drv_register(void)
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{
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return platform_driver_register(&rockchip_clk_link_driver);
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}
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postcore_initcall_sync(rockchip_clk_link_drv_register);
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static void __exit rockchip_clk_link_drv_unregister(void)
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{
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platform_driver_unregister(&rockchip_clk_link_driver);
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}
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module_exit(rockchip_clk_link_drv_unregister);
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MODULE_AUTHOR("Elaine Zhang <zhangqing@rock-chips.com>");
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MODULE_DESCRIPTION("Clock driver for Niu Dependencies");
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MODULE_LICENSE("GPL");
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