/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Preliminary support for HW exception handing for Microblaze
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*
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* Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2008-2009 PetaLogix
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* Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
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*/
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#ifndef _ASM_MICROBLAZE_EXCEPTIONS_H
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#define _ASM_MICROBLAZE_EXCEPTIONS_H
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#ifdef __KERNEL__
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#ifndef CONFIG_MMU
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#define EX_HANDLER_STACK_SIZ (4*19)
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#endif
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#ifndef __ASSEMBLY__
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/* Macros to enable and disable HW exceptions in the MSR */
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/* Define MSR enable bit for HW exceptions */
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#define HWEX_MSR_BIT (1 << 8)
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
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#define __enable_hw_exceptions() \
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__asm__ __volatile__ (" msrset r0, %0; \
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nop;" \
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: \
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: "i" (HWEX_MSR_BIT) \
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: "memory")
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#define __disable_hw_exceptions() \
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__asm__ __volatile__ (" msrclr r0, %0; \
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nop;" \
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: \
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: "i" (HWEX_MSR_BIT) \
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: "memory")
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#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
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#define __enable_hw_exceptions() \
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__asm__ __volatile__ (" \
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mfs r12, rmsr; \
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nop; \
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ori r12, r12, %0; \
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mts rmsr, r12; \
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nop;" \
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: \
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: "i" (HWEX_MSR_BIT) \
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: "memory", "r12")
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#define __disable_hw_exceptions() \
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__asm__ __volatile__ (" \
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mfs r12, rmsr; \
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nop; \
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andi r12, r12, ~%0; \
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mts rmsr, r12; \
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nop;" \
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: \
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: "i" (HWEX_MSR_BIT) \
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: "memory", "r12")
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#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
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asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
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int fsr, int addr);
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asmlinkage void sw_exception(struct pt_regs *regs);
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void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
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void die(const char *str, struct pt_regs *fp, long err);
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void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
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#endif /*__ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */
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