/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*/
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#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H
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#define __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H __FILE__
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#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR)
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#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
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#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
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#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
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#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
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#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
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#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
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#define S3C2412_PWRCFG_BATF_IRQ (1 << 0)
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#define S3C2412_PWRCFG_BATF_IGNORE (2 << 0)
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#define S3C2412_PWRCFG_BATF_SLEEP (3 << 0)
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#define S3C2412_PWRCFG_BATF_MASK (3 << 0)
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#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0 << 6)
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#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1 << 6)
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#define S3C2412_PWRCFG_STANDBYWFI_STOP (2 << 6)
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#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3 << 6)
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#define S3C2412_PWRCFG_STANDBYWFI_MASK (3 << 6)
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#define S3C2412_PWRCFG_RTC_MASKIRQ (1 << 8)
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#define S3C2412_PWRCFG_NAND_NORST (1 << 9)
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#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H */
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