// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1106.dtsi"
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#include "rv1106-evb-v10.dtsi"
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#include "dt-bindings/display/media-bus-format.h"
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#include "rv1106-thunder-boot-emmc.dtsi"
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/ {
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model = "Rockchip RV1106G EVB2 V11 Trailcam Board";
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compatible = "rockchip,rv1106g-evb2-v11-trailcam-emmc", "rockchip,rv1106";
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chosen {
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bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
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};
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/delete-node/ adc-keys;
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 0>;
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io-channel-names = "buttons";
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poll-interval = <100>;
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keyup-threshold-microvolt = <901715>;
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key_volumeup-key {
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label = "key_volumeup";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <17578>;
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};
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};
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backlight: backlight {
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status = "okay";
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compatible = "pwm-backlight";
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pwms = <&pwm7 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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key {
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gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_VOLUMEDOWN>;
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label = "GPIO Key";
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debounce-interval = <100>;
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};
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/*
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linux,cma {
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compatible = "shared-dma-pool";
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inactive;
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reusable;
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size = <0x300000>;
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linux,cma-default;
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};
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*/
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc3v3_sd: vcc3v3-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
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regulator-name = "vcc3v3_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwren>;
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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WIFI,host_wake_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&acodec {
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pa-ctl-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3338_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&display_subsystem {
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status = "okay";
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logo-memory-region = <&drm_logo>;
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};
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&emmc {
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status = "okay";
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};
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&fiq_debugger {
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rockchip,baudrate = <1500000>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m1_xfer>;
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};
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&i2c4 {
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rockchip,amp-shared;
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sc3338: sc3338@30 {
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compatible = "smartsens,sc3338";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "FKO1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3338_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&mailbox {
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status = "okay";
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};
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&pwm7 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm7m1_pins>;
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};
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&pinctrl {
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sdmmc {
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/omit-if-no-ref/
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sdmmc_pwren: sdmmc-pwren {
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rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&pwm10 {
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status = "okay";
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};
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&pwm11 {
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status = "okay";
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};
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&rgb {
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status = "okay";
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rockchip,data-sync-bypass;
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pinctrl-names = "default";
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/*
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* rgb3x8_pins for RGB3x8(8bit)
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* rgb565_pins for RGB565(16bit)
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*/
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pinctrl-0 = <&rgb3x8_pins>;
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/*
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* 320x480 RGB/MCU screen K350C4516T
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*/
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mcu_panel: mcu-panel {
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/*
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* MEDIA_BUS_FMT_RGB888_3X8 for RGB3x8(8bit)
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* MEDIA_BUS_FMT_RGB565_1X16 for RGB565(16bit)
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*/
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bus-format = <MEDIA_BUS_FMT_RGB888_3X8>;
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backlight = <&backlight>;
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enable-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
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enable-delay-ms = <20>;
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reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>;
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reset-delay-ms = <10>;
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prepare-delay-ms = <20>;
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unprepare-delay-ms = <20>;
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disable-delay-ms = <20>;
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init-delay-ms = <10>;
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width-mm = <217>;
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height-mm = <136>;
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// type:0 is cmd, 1 is data
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panel-init-sequence = [
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//type delay num val1 val2 val3
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00 00 01 e0
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01 00 01 00
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01 00 01 07
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01 00 01 0f
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01 00 01 0d
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01 00 01 1b
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01 00 01 0a
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01 00 01 3c
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01 00 01 78
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01 00 01 4a
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01 00 01 07
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01 00 01 0e
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01 00 01 09
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01 00 01 1b
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01 00 01 1e
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01 00 01 0f
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00 00 01 e1
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01 00 01 00
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01 00 01 22
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01 00 01 24
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01 00 01 06
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01 00 01 12
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01 00 01 07
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01 00 01 36
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01 00 01 47
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01 00 01 47
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01 00 01 06
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01 00 01 0a
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01 00 01 07
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01 00 01 30
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01 00 01 37
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01 00 01 0f
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00 00 01 c0
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01 00 01 10
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01 00 01 10
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00 00 01 c1
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01 00 01 41
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00 00 01 c5
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01 00 01 00
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01 00 01 22
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01 00 01 80
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00 00 01 36
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01 00 01 48
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00 00 01 3a
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01 00 01 66 /*
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* interface pixel format:
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* 66 for RGB3x8(8bit)
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* 55 for RGB565(16bit)
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*/
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00 00 01 b0
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01 00 01 00
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00 00 01 b1
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01 00 01 70 /*
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* frame rate control:
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* 70 (45hz) for RGB3x8(8bit)
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* a0 (60hz) for RGB565(16bit)
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*/
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01 00 01 11
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00 00 01 b4
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01 00 01 02
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00 00 01 B6
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01 00 01 02 /*
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* display function control:
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* 32 for RGB
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* 02 for MCU
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*/
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01 00 01 02
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00 00 01 b7
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01 00 01 c6
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00 00 01 be
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01 00 01 00
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01 00 01 04
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00 00 01 e9
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01 00 01 00
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00 00 01 f7
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01 00 01 a9
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01 00 01 51
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01 00 01 2c
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01 00 01 82
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00 78 01 11
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00 32 01 29
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00 00 01 2c
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];
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panel-exit-sequence = [
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//type delay num val1 val2 val3
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00 0a 01 28
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00 78 01 10
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];
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display-timings {
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native-mode = <&kd050fwfba002_timing>;
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kd050fwfba002_timing: timing0 {
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/*
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* 7840125 for frame rate 45Hz
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* 10453500 for frame rate 60Hz
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*/
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clock-frequency = <7840125>;
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hactive = <320>;
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vactive = <480>;
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hback-porch = <10>;
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hfront-porch = <5>;
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vback-porch = <10>;
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vfront-porch = <5>;
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hsync-len = <10>;
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vsync-len = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <1>;
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};
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};
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port {
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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ports {
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rgb_out: port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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rgb_out_panel: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&panel_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vop {
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status = "okay";
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};
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&route_rgb {
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status = "disabled";
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};
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/*
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* The pins of sdmmc1 and lcd are multiplexed
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*/
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&sdio {
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status = "disabled";
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};
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&thunder_boot_service {
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status = "okay";
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};
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&rkisp_thunderboot {
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/* reg's offset MUST match with RTOS */
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/*
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* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
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* e.g. 2304x1296: 0xf30000
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*/
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reg = <0x00860000 0xf30000>;
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};
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&ramdisk_r {
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reg = <0x1790000 (20 * 0x00100000)>;
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};
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&ramdisk_c {
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reg = <0x2b90000 (10 * 0x00100000)>;
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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memory-region-thunderboot = <&rkisp_thunderboot>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp_in>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port@0 {
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isp_in: endpoint {
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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&sdio {
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max-frequency = <50000000>;
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bus-width = <1>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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non-removable;
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rockchip,default-sample-phase = <90>;
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no-sd;
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no-mmc;
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supports-sdio;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
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status = "okay";
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};
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&sdmmc {
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max-frequency = <200000000>;
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no-sdio;
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no-mmc;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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pinctrl-names = "normal", "idle";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
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pinctrl-1 = <&sdmmc0_idle_pins &sdmmc0_det>;
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vmmc-supply = <&vcc3v3_sd>;
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status = "okay";
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};
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&sfc {
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assigned-clocks = <&cru SCLK_SFC>;
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assigned-clock-rates = <125000000>;
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status = "disabled";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <125000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&usbdrd_dwc3 {
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dr_mode = "peripheral";
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};
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&vop {
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status = "okay";
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/*
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* Default config is as follows:
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*
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* mcu-pix-total = <9>;
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* mcu-cs-pst = <1>;
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* mcu-cs-pend = <8>;
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* mcu-rw-pst = <2>;
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* mcu-rw-pend = <5>;
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* mcu-hold-mode = <0>; // default set to 0
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*
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* To increase the frame rate, reduce all parameters because
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* the max dclk rate of mcu is 150M in rv1103/rv1106.
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*/
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mcu-timing {
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mcu-pix-total = <5>;
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mcu-cs-pst = <1>;
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mcu-cs-pend = <4>;
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mcu-rw-pst = <2>;
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mcu-rw-pend = <3>;
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mcu-hold-mode = <0>; // default set to 0
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};
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};
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