# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
%YAML 1.2
|
---
|
$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"
|
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|
title: Loongson-3 HyperTransport Interrupt Vector Controller
|
|
maintainers:
|
- Jiaxun Yang <jiaxun.yang@flygoat.com>
|
|
description:
|
This interrupt controller is found in the Loongson-3 family of chips for
|
receiving vectorized interrupts from PCH's interrupt controller.
|
|
properties:
|
compatible:
|
const: loongson,htvec-1.0
|
|
reg:
|
maxItems: 1
|
|
interrupts:
|
minItems: 1
|
maxItems: 8
|
description: Eight parent interrupts that receive chained interrupts.
|
|
interrupt-controller: true
|
|
'#interrupt-cells':
|
const: 1
|
|
required:
|
- compatible
|
- reg
|
- interrupts
|
- interrupt-controller
|
- '#interrupt-cells'
|
|
additionalProperties: false
|
|
examples:
|
- |
|
#include <dt-bindings/interrupt-controller/irq.h>
|
htvec: interrupt-controller@fb000080 {
|
compatible = "loongson,htvec-1.0";
|
reg = <0xfb000080 0x40>;
|
interrupt-controller;
|
#interrupt-cells = <1>;
|
|
interrupt-parent = <&liointc>;
|
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
|
<25 IRQ_TYPE_LEVEL_HIGH>,
|
<26 IRQ_TYPE_LEVEL_HIGH>,
|
<27 IRQ_TYPE_LEVEL_HIGH>;
|
};
|
...
|
