/*
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* Copyright 2015 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define MODULE_TAG "vp8e_api_v2"
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#include <string.h>
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#include <vp8e_syntax.h>
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#include "mpp_env.h"
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#include "mpp_mem.h"
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#include "mpp_debug.h"
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#include "mpp_common.h"
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#include "mpp_rc.h"
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#include "mpp_enc_cfg_impl.h"
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#include "vp8e_api_v2.h"
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#include "vp8e_rc.h"
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#include "vp8e_syntax.h"
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#define VP8E_DBG_FUNCTION (0x00000001)
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#define VP8E_DBG_CFG (0x00000002)
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#define vp8e_dbg_cfg(fmt, ...) _mpp_dbg_f(vp8e_debug, VP8E_DBG_CFG, fmt, ## __VA_ARGS__)
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#define vp8e_dbg_fun(fmt, ...) _mpp_dbg_f(vp8e_debug, VP8E_DBG_FUNCTION, fmt, ## __VA_ARGS__)
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RK_U32 vp8e_debug = 0;
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#define VP8E_SYN_BUTT 2
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typedef struct {
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/* config from mpp_enc */
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MppEncCfgSet *cfg;
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/* internal rate control config*/
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Vp8eRc *rc;
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Vp8eSyntax vp8e_syntax[VP8E_SYN_BUTT];
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} Vp8eCtx;
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static MPP_RET vp8e_init(void *ctx, EncImplCfg *ctrl_cfg)
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{
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MPP_RET ret = MPP_OK;
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Vp8eCtx *p = (Vp8eCtx *)ctx;
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MppEncRcCfg *rc_cfg = &ctrl_cfg->cfg->rc;
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MppEncPrepCfg *prep = &ctrl_cfg->cfg->prep;
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vp8e_dbg_fun("enter\n");
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if (NULL == ctx || NULL == ctrl_cfg) {
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mpp_err_f("Init failed, contex or controller cfg is null!\n");
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ret = MPP_NOK;
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goto __ERR_RET;
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}
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p->cfg = ctrl_cfg->cfg;
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/*
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* default prep:
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* 720p
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* YUV420SP
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*/
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prep->change = 0;
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prep->width = 1280;
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prep->height = 720;
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prep->hor_stride = 1280;
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prep->ver_stride = 720;
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prep->format = MPP_FMT_YUV420SP;
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prep->rotation = MPP_ENC_ROT_0;
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prep->mirroring = 0;
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prep->denoise = 0;
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/*
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* default rc_cfg:
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* CBR
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* 2Mbps +-25%
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* 30fps
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* gop 60
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*/
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rc_cfg->change = 0;
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rc_cfg->rc_mode = MPP_ENC_RC_MODE_CBR;
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rc_cfg->quality = MPP_ENC_RC_QUALITY_MEDIUM;
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rc_cfg->bps_target = 2000 * 1000;
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rc_cfg->bps_max = rc_cfg->bps_target * 5 / 4;
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rc_cfg->bps_min = rc_cfg->bps_target * 3 / 4;
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rc_cfg->fps_in_flex = 0;
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rc_cfg->fps_in_num = 30;
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rc_cfg->fps_in_denorm = 1;
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rc_cfg->fps_out_flex = 0;
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rc_cfg->fps_out_num = 30;
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rc_cfg->fps_out_denorm = 1;
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rc_cfg->gop = 60;
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rc_cfg->max_reenc_times = 0;
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p->rc = mpp_calloc(Vp8eRc, 1);
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memset(p->rc, 0, sizeof(Vp8eRc));
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p->rc->frame_coded = 1;
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if (NULL == p->rc) {
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mpp_err_f("failed to malloc vp8_rc\n");
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ret = MPP_ERR_MALLOC;
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goto __ERR_RET;
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}
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mpp_env_get_u32("vp8e_debug", &vp8e_debug, 0);
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vp8e_dbg_fun("leave ret %d\n", ret);
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return ret;
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__ERR_RET:
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vp8e_dbg_fun("leave ret %d\n", ret);
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return ret;
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}
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static MPP_RET vp8e_deinit(void *ctx)
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{
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Vp8eCtx *p = (Vp8eCtx *)ctx;
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vp8e_dbg_fun("enter\n");
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if (p->rc)
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mpp_free(p->rc);
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vp8e_dbg_fun("leave\n");
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return MPP_OK;
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}
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static MPP_RET vp8e_start(void *ctx, HalEncTask *task)
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{
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(void)ctx;
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(void)task;
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return MPP_OK;
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}
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static MPP_RET vp8e_proc_dpb(void *ctx, HalEncTask *task)
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{
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(void)ctx;
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EncRcTask *rc_task = task->rc_task;
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EncCpbStatus *cpb = &task->rc_task->cpb;
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rc_task->frm.val = cpb->curr.val;
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return MPP_OK;
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}
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static MPP_RET vp8e_proc_prep_cfg(MppEncPrepCfg *dst, MppEncPrepCfg *src)
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{
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MPP_RET ret = MPP_OK;
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RK_U32 change = src->change;
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mpp_assert(change);
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if (change) {
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if (change & MPP_ENC_PREP_CFG_CHANGE_INPUT) {
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if ((src->width < 0 || src->width > 1920) ||
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(src->height < 0 || src->height > 3840) ||
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(src->hor_stride < 0 || src->hor_stride > 3840) ||
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(src->ver_stride < 0 || src->ver_stride > 3840)) {
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mpp_err("invalid input w:h [%d:%d] [%d:%d]\n",
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src->width, src->height,
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src->hor_stride, src->ver_stride);
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ret = MPP_NOK;
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}
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dst->width = src->width;
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dst->height = src->height;
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dst->ver_stride = src->ver_stride;
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dst->hor_stride = src->hor_stride;
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}
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if (change & MPP_ENC_PREP_CFG_CHANGE_FORMAT) {
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if ((src->format < MPP_FRAME_FMT_RGB &&
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src->format >= MPP_FMT_YUV_BUTT) ||
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src->format >= MPP_FMT_RGB_BUTT) {
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mpp_err("invalid format %d\n", src->format);
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ret = MPP_NOK;
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}
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dst->format = src->format;
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}
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dst->change |= src->change;
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vp8e_dbg_cfg("width %d height %d hor_stride %d ver_srtride %d format 0x%x\n",
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dst->width, dst->height, dst->hor_stride, dst->ver_stride, dst->format);
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}
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return ret;
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}
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static MPP_RET vp8e_proc_split_cfg(MppEncSliceSplit *dst, MppEncSliceSplit *src)
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{
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MPP_RET ret = MPP_OK;
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RK_U32 change = src->change;
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if (change & MPP_ENC_SPLIT_CFG_CHANGE_MODE) {
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dst->split_mode = src->split_mode;
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dst->split_arg = src->split_arg;
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}
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if (change & MPP_ENC_SPLIT_CFG_CHANGE_ARG)
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dst->split_arg = src->split_arg;
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dst->change |= change;
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return ret;
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}
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static MPP_RET vp8e_proc_vp8_cfg(MppEncVp8Cfg *dst, MppEncVp8Cfg *src)
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{
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RK_U32 change = src->change;
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if (change & MPP_ENC_VP8_CFG_CHANGE_QP) {
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dst->qp_init = src->qp_init;
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dst->qp_max = src->qp_max;
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dst->qp_min = src->qp_min;
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dst->qp_max_i = src->qp_max_i;
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dst->qp_min_i = src->qp_min_i;
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}
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if (change & MPP_ENC_VP8_CFG_CHANGE_DIS_IVF) {
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dst->disable_ivf = src->disable_ivf;
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}
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vp8e_dbg_cfg("rc cfg qp_init %d qp_max %d qp_min %d qp_max_i %d qp_min_i %d, disable_ivf %d\n",
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dst->qp_init, dst->qp_max, dst->qp_min, dst->qp_max_i, dst->qp_min_i, dst->disable_ivf);
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dst->change |= src->change;
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return MPP_OK;
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}
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static MPP_RET vp8e_proc_cfg(void *ctx, MpiCmd cmd, void *param)
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{
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MPP_RET ret = MPP_OK;
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Vp8eCtx *p = (Vp8eCtx *)ctx;
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MppEncCfgSet *cfg = p->cfg;
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MppEncCfgImpl *impl = (MppEncCfgImpl *)param;
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MppEncCfgSet *src = &impl->cfg;
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vp8e_dbg_fun("enter ctx %p cmd %x param %p\n", ctx, cmd, param);
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switch (cmd) {
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case MPP_ENC_SET_CFG : {
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if (src->prep.change) {
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ret |= vp8e_proc_prep_cfg(&cfg->prep, &src->prep);
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src->prep.change = 0;
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}
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if (src->codec.vp8.change) {
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ret |= vp8e_proc_vp8_cfg(&cfg->codec.vp8, &src->codec.vp8);
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src->codec.vp8.change = 0;
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}
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if (src->split.change) {
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ret |= vp8e_proc_split_cfg(&cfg->split, &src->split);
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src->split.change = 0;
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}
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} break;
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default: {
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mpp_err("No correspond cmd found, and can not config!");
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ret = MPP_NOK;
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} break;
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}
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vp8e_dbg_fun("leave ret %d\n", ret);
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return ret;
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}
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static MPP_RET vp8e_proc_hal(void *ctx, HalEncTask *task)
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{
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Vp8eCtx *p = (Vp8eCtx *)ctx;
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Vp8eSyntax *syntax = &p->vp8e_syntax[0];
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RK_U32 syn_num = 0;
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syntax[syn_num].type = VP8E_SYN_CFG;
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syntax[syn_num].data = p->cfg;
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syn_num++;
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syntax[syn_num].type = VP8E_SYN_RC;
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syntax[syn_num].data = p->rc;
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syn_num++;
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task->syntax.data = syntax;
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task->syntax.number = syn_num;
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task->valid = 1;
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return MPP_OK;
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}
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const EncImplApi api_vp8e = {
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.name = "vp8_control",
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.coding = MPP_VIDEO_CodingVP8,
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.ctx_size = sizeof(Vp8eCtx),
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.flag = 0,
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.init = vp8e_init,
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.deinit = vp8e_deinit,
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.proc_cfg = vp8e_proc_cfg,
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.gen_hdr = NULL,
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.start = vp8e_start,
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.proc_dpb = vp8e_proc_dpb,
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.proc_hal = vp8e_proc_hal,
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.add_prefix = NULL,
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.sw_enc = NULL,
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};
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