// SPDX-License-Identifier: GPL-2.0
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/*---------------------------------------------------------------------------+
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| load_store.c |
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| This file contains most of the code to interpret the FPU instructions |
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| which load and store from user memory. |
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| Copyright (C) 1992,1993,1994,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| Australia. E-mail billm@suburbia.net |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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#include <linux/uaccess.h>
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#include "fpu_system.h"
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#include "exception.h"
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#include "fpu_emu.h"
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#include "status_w.h"
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#include "control_w.h"
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#define _NONE_ 0 /* st0_ptr etc not needed */
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#define _REG0_ 1 /* Will be storing st(0) */
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#define _PUSH_ 3 /* Need to check for space to push onto stack */
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#define _null_ 4 /* Function illegal or not implemented */
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#define pop_0() { FPU_settag0(TAG_Empty); top++; }
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/* index is a 5-bit value: (3-bit FPU_modrm.reg field | opcode[2,1]) */
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static u_char const type_table[32] = {
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_PUSH_, _PUSH_, _PUSH_, _PUSH_, /* /0: d9:fld f32, db:fild m32, dd:fld f64, df:fild m16 */
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_null_, _REG0_, _REG0_, _REG0_, /* /1: d9:undef, db,dd,df:fisttp m32/64/16 */
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_REG0_, _REG0_, _REG0_, _REG0_, /* /2: d9:fst f32, db:fist m32, dd:fst f64, df:fist m16 */
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_REG0_, _REG0_, _REG0_, _REG0_, /* /3: d9:fstp f32, db:fistp m32, dd:fstp f64, df:fistp m16 */
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_NONE_, _null_, _NONE_, _PUSH_,
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_NONE_, _PUSH_, _null_, _PUSH_,
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_NONE_, _null_, _NONE_, _REG0_,
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_NONE_, _REG0_, _NONE_, _REG0_
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};
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u_char const data_sizes_16[32] = {
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4, 4, 8, 2,
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0, 4, 8, 2, /* /1: d9:undef, db,dd,df:fisttp */
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4, 4, 8, 2,
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4, 4, 8, 2,
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14, 0, 94, 10, 2, 10, 0, 8,
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14, 0, 94, 10, 2, 10, 2, 8
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};
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static u_char const data_sizes_32[32] = {
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4, 4, 8, 2,
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0, 4, 8, 2, /* /1: d9:undef, db,dd,df:fisttp */
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4, 4, 8, 2,
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4, 4, 8, 2,
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28, 0, 108, 10, 2, 10, 0, 8,
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28, 0, 108, 10, 2, 10, 2, 8
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};
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int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
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void __user * data_address)
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{
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FPU_REG loaded_data;
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FPU_REG *st0_ptr;
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u_char st0_tag = TAG_Empty; /* This is just to stop a gcc warning. */
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u_char loaded_tag;
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int sv_cw;
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st0_ptr = NULL; /* Initialized just to stop compiler warnings. */
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if (addr_modes.default_mode & PROTECTED) {
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if (addr_modes.default_mode == SEG32) {
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if (access_limit < data_sizes_32[type])
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math_abort(FPU_info, SIGSEGV);
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} else if (addr_modes.default_mode == PM16) {
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if (access_limit < data_sizes_16[type])
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math_abort(FPU_info, SIGSEGV);
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}
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#ifdef PARANOID
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else
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EXCEPTION(EX_INTERNAL | 0x140);
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#endif /* PARANOID */
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}
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switch (type_table[type]) {
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case _NONE_:
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break;
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case _REG0_:
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st0_ptr = &st(0); /* Some of these instructions pop after
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storing */
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st0_tag = FPU_gettag0();
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break;
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case _PUSH_:
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{
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if (FPU_gettagi(-1) != TAG_Empty) {
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FPU_stack_overflow();
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return 0;
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}
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top--;
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st0_ptr = &st(0);
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}
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break;
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case _null_:
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FPU_illegal();
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return 0;
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#ifdef PARANOID
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default:
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EXCEPTION(EX_INTERNAL | 0x141);
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return 0;
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#endif /* PARANOID */
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}
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switch (type) {
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/* type is a 5-bit value: (3-bit FPU_modrm.reg field | opcode[2,1]) */
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case 000: /* fld m32real (d9 /0) */
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clear_C1();
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loaded_tag =
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FPU_load_single((float __user *)data_address, &loaded_data);
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if ((loaded_tag == TAG_Special)
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&& isNaN(&loaded_data)
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&& (real_1op_NaN(&loaded_data) < 0)) {
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top++;
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break;
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}
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FPU_copy_to_reg0(&loaded_data, loaded_tag);
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break;
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case 001: /* fild m32int (db /0) */
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clear_C1();
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loaded_tag =
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FPU_load_int32((long __user *)data_address, &loaded_data);
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FPU_copy_to_reg0(&loaded_data, loaded_tag);
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break;
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case 002: /* fld m64real (dd /0) */
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clear_C1();
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loaded_tag =
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FPU_load_double((double __user *)data_address,
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&loaded_data);
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if ((loaded_tag == TAG_Special)
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&& isNaN(&loaded_data)
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&& (real_1op_NaN(&loaded_data) < 0)) {
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top++;
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break;
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}
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FPU_copy_to_reg0(&loaded_data, loaded_tag);
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break;
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case 003: /* fild m16int (df /0) */
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clear_C1();
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loaded_tag =
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FPU_load_int16((short __user *)data_address, &loaded_data);
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FPU_copy_to_reg0(&loaded_data, loaded_tag);
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break;
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/* case 004: undefined (d9 /1) */
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/* fisttp are enabled if CPUID(1).ECX(0) "sse3" is set */
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case 005: /* fisttp m32int (db /1) */
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clear_C1();
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sv_cw = control_word;
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control_word |= RC_CHOP;
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if (FPU_store_int32
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(st0_ptr, st0_tag, (long __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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control_word = sv_cw;
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break;
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case 006: /* fisttp m64int (dd /1) */
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clear_C1();
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sv_cw = control_word;
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control_word |= RC_CHOP;
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if (FPU_store_int64
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(st0_ptr, st0_tag, (long long __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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control_word = sv_cw;
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break;
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case 007: /* fisttp m16int (df /1) */
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clear_C1();
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sv_cw = control_word;
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control_word |= RC_CHOP;
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if (FPU_store_int16
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(st0_ptr, st0_tag, (short __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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control_word = sv_cw;
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break;
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case 010: /* fst m32real */
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clear_C1();
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FPU_store_single(st0_ptr, st0_tag,
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(float __user *)data_address);
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break;
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case 011: /* fist m32int */
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clear_C1();
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FPU_store_int32(st0_ptr, st0_tag, (long __user *)data_address);
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break;
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case 012: /* fst m64real */
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clear_C1();
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FPU_store_double(st0_ptr, st0_tag,
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(double __user *)data_address);
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break;
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case 013: /* fist m16int */
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clear_C1();
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FPU_store_int16(st0_ptr, st0_tag, (short __user *)data_address);
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break;
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case 014: /* fstp m32real */
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clear_C1();
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if (FPU_store_single
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(st0_ptr, st0_tag, (float __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 015: /* fistp m32int */
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clear_C1();
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if (FPU_store_int32
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(st0_ptr, st0_tag, (long __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 016: /* fstp m64real */
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clear_C1();
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if (FPU_store_double
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(st0_ptr, st0_tag, (double __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 017: /* fistp m16int */
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clear_C1();
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if (FPU_store_int16
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(st0_ptr, st0_tag, (short __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 020: /* fldenv m14/28byte */
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fldenv(addr_modes, (u_char __user *) data_address);
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/* Ensure that the values just loaded are not changed by
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fix-up operations. */
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return 1;
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case 022: /* frstor m94/108byte */
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frstor(addr_modes, (u_char __user *) data_address);
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/* Ensure that the values just loaded are not changed by
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fix-up operations. */
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return 1;
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case 023: /* fbld m80dec */
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clear_C1();
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loaded_tag = FPU_load_bcd((u_char __user *) data_address);
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FPU_settag0(loaded_tag);
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break;
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case 024: /* fldcw */
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RE_ENTRANT_CHECK_OFF;
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FPU_access_ok(VERIFY_READ, data_address, 2);
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FPU_get_user(control_word,
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(unsigned short __user *)data_address);
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RE_ENTRANT_CHECK_ON;
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if (partial_status & ~control_word & CW_Exceptions)
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partial_status |= (SW_Summary | SW_Backward);
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else
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partial_status &= ~(SW_Summary | SW_Backward);
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#ifdef PECULIAR_486
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control_word |= 0x40; /* An 80486 appears to always set this bit */
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#endif /* PECULIAR_486 */
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return 1;
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case 025: /* fld m80real */
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clear_C1();
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loaded_tag =
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FPU_load_extended((long double __user *)data_address, 0);
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FPU_settag0(loaded_tag);
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break;
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case 027: /* fild m64int */
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clear_C1();
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loaded_tag = FPU_load_int64((long long __user *)data_address);
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if (loaded_tag == TAG_Error)
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return 0;
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FPU_settag0(loaded_tag);
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break;
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case 030: /* fstenv m14/28byte */
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fstenv(addr_modes, (u_char __user *) data_address);
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return 1;
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case 032: /* fsave */
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fsave(addr_modes, (u_char __user *) data_address);
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return 1;
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case 033: /* fbstp m80dec */
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clear_C1();
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if (FPU_store_bcd
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(st0_ptr, st0_tag, (u_char __user *) data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 034: /* fstcw m16int */
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RE_ENTRANT_CHECK_OFF;
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FPU_access_ok(VERIFY_WRITE, data_address, 2);
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FPU_put_user(control_word,
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(unsigned short __user *)data_address);
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RE_ENTRANT_CHECK_ON;
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return 1;
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case 035: /* fstp m80real */
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clear_C1();
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if (FPU_store_extended
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(st0_ptr, st0_tag, (long double __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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case 036: /* fstsw m2byte */
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RE_ENTRANT_CHECK_OFF;
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FPU_access_ok(VERIFY_WRITE, data_address, 2);
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FPU_put_user(status_word(),
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(unsigned short __user *)data_address);
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RE_ENTRANT_CHECK_ON;
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return 1;
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case 037: /* fistp m64int */
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clear_C1();
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if (FPU_store_int64
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(st0_ptr, st0_tag, (long long __user *)data_address))
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pop_0(); /* pop only if the number was actually stored
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(see the 80486 manual p16-28) */
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break;
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}
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return 0;
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}
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