/*
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* Copyright (C) 2013 Advanced Micro Devices, Inc.
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*
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* Author: Jacob Shin <jacob.shin@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/perf_event.h>
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#include <linux/percpu.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <asm/cpufeature.h>
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#include <asm/perf_event.h>
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#include <asm/msr.h>
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#include <asm/smp.h>
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#define NUM_COUNTERS_NB 4
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#define NUM_COUNTERS_L2 4
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#define NUM_COUNTERS_L3 6
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#define MAX_COUNTERS 6
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#define RDPMC_BASE_NB 6
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#define RDPMC_BASE_LLC 10
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#define COUNTER_SHIFT 16
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#undef pr_fmt
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#define pr_fmt(fmt) "amd_uncore: " fmt
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static int num_counters_llc;
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static int num_counters_nb;
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static bool l3_mask;
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static HLIST_HEAD(uncore_unused_list);
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struct amd_uncore {
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int id;
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int refcnt;
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int cpu;
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int num_counters;
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int rdpmc_base;
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u32 msr_base;
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cpumask_t *active_mask;
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struct pmu *pmu;
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struct perf_event *events[MAX_COUNTERS];
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struct hlist_node node;
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};
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static struct amd_uncore * __percpu *amd_uncore_nb;
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static struct amd_uncore * __percpu *amd_uncore_llc;
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static struct pmu amd_nb_pmu;
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static struct pmu amd_llc_pmu;
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static cpumask_t amd_nb_active_mask;
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static cpumask_t amd_llc_active_mask;
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static bool is_nb_event(struct perf_event *event)
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{
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return event->pmu->type == amd_nb_pmu.type;
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}
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static bool is_llc_event(struct perf_event *event)
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{
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return event->pmu->type == amd_llc_pmu.type;
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}
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static struct amd_uncore *event_to_amd_uncore(struct perf_event *event)
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{
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if (is_nb_event(event) && amd_uncore_nb)
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return *per_cpu_ptr(amd_uncore_nb, event->cpu);
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else if (is_llc_event(event) && amd_uncore_llc)
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return *per_cpu_ptr(amd_uncore_llc, event->cpu);
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return NULL;
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}
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static void amd_uncore_read(struct perf_event *event)
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{
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struct hw_perf_event *hwc = &event->hw;
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u64 prev, new;
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s64 delta;
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/*
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* since we do not enable counter overflow interrupts,
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* we do not have to worry about prev_count changing on us
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*/
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prev = local64_read(&hwc->prev_count);
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rdpmcl(hwc->event_base_rdpmc, new);
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local64_set(&hwc->prev_count, new);
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delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
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delta >>= COUNTER_SHIFT;
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local64_add(delta, &event->count);
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}
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static void amd_uncore_start(struct perf_event *event, int flags)
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{
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struct hw_perf_event *hwc = &event->hw;
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if (flags & PERF_EF_RELOAD)
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wrmsrl(hwc->event_base, (u64)local64_read(&hwc->prev_count));
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hwc->state = 0;
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wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE));
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perf_event_update_userpage(event);
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}
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static void amd_uncore_stop(struct perf_event *event, int flags)
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{
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struct hw_perf_event *hwc = &event->hw;
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wrmsrl(hwc->config_base, hwc->config);
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hwc->state |= PERF_HES_STOPPED;
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if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
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amd_uncore_read(event);
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hwc->state |= PERF_HES_UPTODATE;
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}
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}
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static int amd_uncore_add(struct perf_event *event, int flags)
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{
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int i;
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struct amd_uncore *uncore = event_to_amd_uncore(event);
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struct hw_perf_event *hwc = &event->hw;
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/* are we already assigned? */
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if (hwc->idx != -1 && uncore->events[hwc->idx] == event)
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goto out;
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for (i = 0; i < uncore->num_counters; i++) {
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if (uncore->events[i] == event) {
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hwc->idx = i;
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goto out;
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}
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}
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/* if not, take the first available counter */
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hwc->idx = -1;
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for (i = 0; i < uncore->num_counters; i++) {
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if (cmpxchg(&uncore->events[i], NULL, event) == NULL) {
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hwc->idx = i;
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break;
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}
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}
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out:
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if (hwc->idx == -1)
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return -EBUSY;
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hwc->config_base = uncore->msr_base + (2 * hwc->idx);
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hwc->event_base = uncore->msr_base + 1 + (2 * hwc->idx);
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hwc->event_base_rdpmc = uncore->rdpmc_base + hwc->idx;
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hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
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if (flags & PERF_EF_START)
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amd_uncore_start(event, PERF_EF_RELOAD);
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return 0;
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}
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static void amd_uncore_del(struct perf_event *event, int flags)
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{
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int i;
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struct amd_uncore *uncore = event_to_amd_uncore(event);
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struct hw_perf_event *hwc = &event->hw;
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amd_uncore_stop(event, PERF_EF_UPDATE);
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for (i = 0; i < uncore->num_counters; i++) {
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if (cmpxchg(&uncore->events[i], event, NULL) == event)
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break;
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}
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hwc->idx = -1;
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}
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static int amd_uncore_event_init(struct perf_event *event)
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{
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struct amd_uncore *uncore;
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struct hw_perf_event *hwc = &event->hw;
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if (event->attr.type != event->pmu->type)
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return -ENOENT;
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/*
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* NB and Last level cache counters (MSRs) are shared across all cores
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* that share the same NB / Last level cache. On family 16h and below,
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* Interrupts can be directed to a single target core, however, event
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* counts generated by processes running on other cores cannot be masked
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* out. So we do not support sampling and per-thread events via
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* CAP_NO_INTERRUPT, and we do not enable counter overflow interrupts:
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*/
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/* NB and Last level cache counters do not have usr/os/guest/host bits */
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if (event->attr.exclude_user || event->attr.exclude_kernel ||
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event->attr.exclude_host || event->attr.exclude_guest)
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return -EINVAL;
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hwc->config = event->attr.config & AMD64_RAW_EVENT_MASK_NB;
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hwc->idx = -1;
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if (event->cpu < 0)
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return -EINVAL;
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/*
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* SliceMask and ThreadMask need to be set for certain L3 events in
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* Family 17h. For other events, the two fields do not affect the count.
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*/
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if (l3_mask && is_llc_event(event)) {
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int thread = 2 * (cpu_data(event->cpu).cpu_core_id % 4);
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if (smp_num_siblings > 1)
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thread += cpu_data(event->cpu).apicid & 1;
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hwc->config |= (1ULL << (AMD64_L3_THREAD_SHIFT + thread) &
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AMD64_L3_THREAD_MASK) | AMD64_L3_SLICE_MASK;
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}
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uncore = event_to_amd_uncore(event);
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if (!uncore)
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return -ENODEV;
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/*
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* since request can come in to any of the shared cores, we will remap
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* to a single common cpu.
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*/
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event->cpu = uncore->cpu;
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return 0;
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}
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static ssize_t amd_uncore_attr_show_cpumask(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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cpumask_t *active_mask;
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struct pmu *pmu = dev_get_drvdata(dev);
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if (pmu->type == amd_nb_pmu.type)
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active_mask = &amd_nb_active_mask;
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else if (pmu->type == amd_llc_pmu.type)
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active_mask = &amd_llc_active_mask;
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else
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return 0;
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return cpumap_print_to_pagebuf(true, buf, active_mask);
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}
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static DEVICE_ATTR(cpumask, S_IRUGO, amd_uncore_attr_show_cpumask, NULL);
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static struct attribute *amd_uncore_attrs[] = {
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&dev_attr_cpumask.attr,
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NULL,
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};
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static struct attribute_group amd_uncore_attr_group = {
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.attrs = amd_uncore_attrs,
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};
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/*
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* Similar to PMU_FORMAT_ATTR but allowing for format_attr to be assigned based
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* on family
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*/
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#define AMD_FORMAT_ATTR(_dev, _name, _format) \
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static ssize_t \
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_dev##_show##_name(struct device *dev, \
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struct device_attribute *attr, \
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char *page) \
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{ \
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BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
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return sprintf(page, _format "\n"); \
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} \
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static struct device_attribute format_attr_##_dev##_name = __ATTR_RO(_dev);
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/* Used for each uncore counter type */
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#define AMD_ATTRIBUTE(_name) \
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static struct attribute *amd_uncore_format_attr_##_name[] = { \
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&format_attr_event_##_name.attr, \
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&format_attr_umask.attr, \
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NULL, \
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}; \
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static struct attribute_group amd_uncore_format_group_##_name = { \
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.name = "format", \
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.attrs = amd_uncore_format_attr_##_name, \
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}; \
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static const struct attribute_group *amd_uncore_attr_groups_##_name[] = { \
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&amd_uncore_attr_group, \
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&amd_uncore_format_group_##_name, \
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NULL, \
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};
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AMD_FORMAT_ATTR(event, , "config:0-7,32-35");
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AMD_FORMAT_ATTR(umask, , "config:8-15");
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AMD_FORMAT_ATTR(event, _df, "config:0-7,32-35,59-60");
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AMD_FORMAT_ATTR(event, _l3, "config:0-7");
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AMD_ATTRIBUTE(df);
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AMD_ATTRIBUTE(l3);
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static struct pmu amd_nb_pmu = {
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.task_ctx_nr = perf_invalid_context,
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.event_init = amd_uncore_event_init,
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.add = amd_uncore_add,
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.del = amd_uncore_del,
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.start = amd_uncore_start,
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.stop = amd_uncore_stop,
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.read = amd_uncore_read,
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.capabilities = PERF_PMU_CAP_NO_INTERRUPT,
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};
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static struct pmu amd_llc_pmu = {
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.task_ctx_nr = perf_invalid_context,
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.event_init = amd_uncore_event_init,
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.add = amd_uncore_add,
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.del = amd_uncore_del,
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.start = amd_uncore_start,
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.stop = amd_uncore_stop,
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.read = amd_uncore_read,
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.capabilities = PERF_PMU_CAP_NO_INTERRUPT,
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};
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static struct amd_uncore *amd_uncore_alloc(unsigned int cpu)
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{
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return kzalloc_node(sizeof(struct amd_uncore), GFP_KERNEL,
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cpu_to_node(cpu));
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}
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static int amd_uncore_cpu_up_prepare(unsigned int cpu)
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{
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struct amd_uncore *uncore_nb = NULL, *uncore_llc;
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if (amd_uncore_nb) {
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uncore_nb = amd_uncore_alloc(cpu);
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if (!uncore_nb)
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goto fail;
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uncore_nb->cpu = cpu;
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uncore_nb->num_counters = num_counters_nb;
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uncore_nb->rdpmc_base = RDPMC_BASE_NB;
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uncore_nb->msr_base = MSR_F15H_NB_PERF_CTL;
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uncore_nb->active_mask = &amd_nb_active_mask;
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uncore_nb->pmu = &amd_nb_pmu;
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uncore_nb->id = -1;
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*per_cpu_ptr(amd_uncore_nb, cpu) = uncore_nb;
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}
|
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if (amd_uncore_llc) {
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uncore_llc = amd_uncore_alloc(cpu);
|
if (!uncore_llc)
|
goto fail;
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uncore_llc->cpu = cpu;
|
uncore_llc->num_counters = num_counters_llc;
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uncore_llc->rdpmc_base = RDPMC_BASE_LLC;
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uncore_llc->msr_base = MSR_F16H_L2I_PERF_CTL;
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uncore_llc->active_mask = &amd_llc_active_mask;
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uncore_llc->pmu = &amd_llc_pmu;
|
uncore_llc->id = -1;
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*per_cpu_ptr(amd_uncore_llc, cpu) = uncore_llc;
|
}
|
|
return 0;
|
|
fail:
|
if (amd_uncore_nb)
|
*per_cpu_ptr(amd_uncore_nb, cpu) = NULL;
|
kfree(uncore_nb);
|
return -ENOMEM;
|
}
|
|
static struct amd_uncore *
|
amd_uncore_find_online_sibling(struct amd_uncore *this,
|
struct amd_uncore * __percpu *uncores)
|
{
|
unsigned int cpu;
|
struct amd_uncore *that;
|
|
for_each_online_cpu(cpu) {
|
that = *per_cpu_ptr(uncores, cpu);
|
|
if (!that)
|
continue;
|
|
if (this == that)
|
continue;
|
|
if (this->id == that->id) {
|
hlist_add_head(&this->node, &uncore_unused_list);
|
this = that;
|
break;
|
}
|
}
|
|
this->refcnt++;
|
return this;
|
}
|
|
static int amd_uncore_cpu_starting(unsigned int cpu)
|
{
|
unsigned int eax, ebx, ecx, edx;
|
struct amd_uncore *uncore;
|
|
if (amd_uncore_nb) {
|
uncore = *per_cpu_ptr(amd_uncore_nb, cpu);
|
cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
|
uncore->id = ecx & 0xff;
|
|
uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_nb);
|
*per_cpu_ptr(amd_uncore_nb, cpu) = uncore;
|
}
|
|
if (amd_uncore_llc) {
|
uncore = *per_cpu_ptr(amd_uncore_llc, cpu);
|
uncore->id = per_cpu(cpu_llc_id, cpu);
|
|
uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_llc);
|
*per_cpu_ptr(amd_uncore_llc, cpu) = uncore;
|
}
|
|
return 0;
|
}
|
|
static void uncore_clean_online(void)
|
{
|
struct amd_uncore *uncore;
|
struct hlist_node *n;
|
|
hlist_for_each_entry_safe(uncore, n, &uncore_unused_list, node) {
|
hlist_del(&uncore->node);
|
kfree(uncore);
|
}
|
}
|
|
static void uncore_online(unsigned int cpu,
|
struct amd_uncore * __percpu *uncores)
|
{
|
struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
|
|
uncore_clean_online();
|
|
if (cpu == uncore->cpu)
|
cpumask_set_cpu(cpu, uncore->active_mask);
|
}
|
|
static int amd_uncore_cpu_online(unsigned int cpu)
|
{
|
if (amd_uncore_nb)
|
uncore_online(cpu, amd_uncore_nb);
|
|
if (amd_uncore_llc)
|
uncore_online(cpu, amd_uncore_llc);
|
|
return 0;
|
}
|
|
static void uncore_down_prepare(unsigned int cpu,
|
struct amd_uncore * __percpu *uncores)
|
{
|
unsigned int i;
|
struct amd_uncore *this = *per_cpu_ptr(uncores, cpu);
|
|
if (this->cpu != cpu)
|
return;
|
|
/* this cpu is going down, migrate to a shared sibling if possible */
|
for_each_online_cpu(i) {
|
struct amd_uncore *that = *per_cpu_ptr(uncores, i);
|
|
if (cpu == i)
|
continue;
|
|
if (this == that) {
|
perf_pmu_migrate_context(this->pmu, cpu, i);
|
cpumask_clear_cpu(cpu, that->active_mask);
|
cpumask_set_cpu(i, that->active_mask);
|
that->cpu = i;
|
break;
|
}
|
}
|
}
|
|
static int amd_uncore_cpu_down_prepare(unsigned int cpu)
|
{
|
if (amd_uncore_nb)
|
uncore_down_prepare(cpu, amd_uncore_nb);
|
|
if (amd_uncore_llc)
|
uncore_down_prepare(cpu, amd_uncore_llc);
|
|
return 0;
|
}
|
|
static void uncore_dead(unsigned int cpu, struct amd_uncore * __percpu *uncores)
|
{
|
struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
|
|
if (cpu == uncore->cpu)
|
cpumask_clear_cpu(cpu, uncore->active_mask);
|
|
if (!--uncore->refcnt)
|
kfree(uncore);
|
*per_cpu_ptr(uncores, cpu) = NULL;
|
}
|
|
static int amd_uncore_cpu_dead(unsigned int cpu)
|
{
|
if (amd_uncore_nb)
|
uncore_dead(cpu, amd_uncore_nb);
|
|
if (amd_uncore_llc)
|
uncore_dead(cpu, amd_uncore_llc);
|
|
return 0;
|
}
|
|
static int __init amd_uncore_init(void)
|
{
|
int ret = -ENODEV;
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
|
return -ENODEV;
|
|
if (!boot_cpu_has(X86_FEATURE_TOPOEXT))
|
return -ENODEV;
|
|
if (boot_cpu_data.x86 == 0x17) {
|
/*
|
* For F17h, the Northbridge counters are repurposed as Data
|
* Fabric counters. Also, L3 counters are supported too. The PMUs
|
* are exported based on family as either L2 or L3 and NB or DF.
|
*/
|
num_counters_nb = NUM_COUNTERS_NB;
|
num_counters_llc = NUM_COUNTERS_L3;
|
amd_nb_pmu.name = "amd_df";
|
amd_llc_pmu.name = "amd_l3";
|
format_attr_event_df.show = &event_show_df;
|
format_attr_event_l3.show = &event_show_l3;
|
l3_mask = true;
|
} else {
|
num_counters_nb = NUM_COUNTERS_NB;
|
num_counters_llc = NUM_COUNTERS_L2;
|
amd_nb_pmu.name = "amd_nb";
|
amd_llc_pmu.name = "amd_l2";
|
format_attr_event_df = format_attr_event;
|
format_attr_event_l3 = format_attr_event;
|
l3_mask = false;
|
}
|
|
amd_nb_pmu.attr_groups = amd_uncore_attr_groups_df;
|
amd_llc_pmu.attr_groups = amd_uncore_attr_groups_l3;
|
|
if (boot_cpu_has(X86_FEATURE_PERFCTR_NB)) {
|
amd_uncore_nb = alloc_percpu(struct amd_uncore *);
|
if (!amd_uncore_nb) {
|
ret = -ENOMEM;
|
goto fail_nb;
|
}
|
ret = perf_pmu_register(&amd_nb_pmu, amd_nb_pmu.name, -1);
|
if (ret)
|
goto fail_nb;
|
|
pr_info("AMD NB counters detected\n");
|
ret = 0;
|
}
|
|
if (boot_cpu_has(X86_FEATURE_PERFCTR_LLC)) {
|
amd_uncore_llc = alloc_percpu(struct amd_uncore *);
|
if (!amd_uncore_llc) {
|
ret = -ENOMEM;
|
goto fail_llc;
|
}
|
ret = perf_pmu_register(&amd_llc_pmu, amd_llc_pmu.name, -1);
|
if (ret)
|
goto fail_llc;
|
|
pr_info("AMD LLC counters detected\n");
|
ret = 0;
|
}
|
|
/*
|
* Install callbacks. Core will call them for each online cpu.
|
*/
|
if (cpuhp_setup_state(CPUHP_PERF_X86_AMD_UNCORE_PREP,
|
"perf/x86/amd/uncore:prepare",
|
amd_uncore_cpu_up_prepare, amd_uncore_cpu_dead))
|
goto fail_llc;
|
|
if (cpuhp_setup_state(CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING,
|
"perf/x86/amd/uncore:starting",
|
amd_uncore_cpu_starting, NULL))
|
goto fail_prep;
|
if (cpuhp_setup_state(CPUHP_AP_PERF_X86_AMD_UNCORE_ONLINE,
|
"perf/x86/amd/uncore:online",
|
amd_uncore_cpu_online,
|
amd_uncore_cpu_down_prepare))
|
goto fail_start;
|
return 0;
|
|
fail_start:
|
cpuhp_remove_state(CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING);
|
fail_prep:
|
cpuhp_remove_state(CPUHP_PERF_X86_AMD_UNCORE_PREP);
|
fail_llc:
|
if (boot_cpu_has(X86_FEATURE_PERFCTR_NB))
|
perf_pmu_unregister(&amd_nb_pmu);
|
if (amd_uncore_llc)
|
free_percpu(amd_uncore_llc);
|
fail_nb:
|
if (amd_uncore_nb)
|
free_percpu(amd_uncore_nb);
|
|
return ret;
|
}
|
device_initcall(amd_uncore_init);
|
