* Pin configuration nodes
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Required properties:
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- pio-map : array of pin configurations. Each pin is defined by 6
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integers. The six numbers are respectively: port, pin, dir,
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open_drain, assignment, has_irq.
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- port : port number of the pin; 0-6 represent port A-G in UM.
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- pin : pin number in the port.
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- dir : direction of the pin, should encode as follows:
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0 = The pin is disabled
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1 = The pin is an output
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2 = The pin is an input
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3 = The pin is I/O
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- open_drain : indicates the pin is normal or wired-OR:
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0 = The pin is actively driven as an output
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1 = The pin is an open-drain driver. As an output, the pin is
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driven active-low, otherwise it is three-stated.
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- assignment : function number of the pin according to the Pin Assignment
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tables in User Manual. Each pin can have up to 4 possible functions in
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QE and two options for CPM.
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- has_irq : indicates if the pin is used as source of external
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interrupts.
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Example:
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ucc_pin@1 {
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pio-map = <
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/* port pin dir open_drain assignment has_irq */
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0 3 1 0 1 0 /* TxD0 */
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0 4 1 0 1 0 /* TxD1 */
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0 5 1 0 1 0 /* TxD2 */
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0 6 1 0 1 0 /* TxD3 */
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1 6 1 0 3 0 /* TxD4 */
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1 7 1 0 1 0 /* TxD5 */
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1 9 1 0 2 0 /* TxD6 */
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1 a 1 0 2 0 /* TxD7 */
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0 9 2 0 1 0 /* RxD0 */
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0 a 2 0 1 0 /* RxD1 */
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0 b 2 0 1 0 /* RxD2 */
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0 c 2 0 1 0 /* RxD3 */
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0 d 2 0 1 0 /* RxD4 */
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1 1 2 0 2 0 /* RxD5 */
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1 0 2 0 2 0 /* RxD6 */
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1 4 2 0 2 0 /* RxD7 */
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0 7 1 0 1 0 /* TX_EN */
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0 8 1 0 1 0 /* TX_ER */
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0 f 2 0 1 0 /* RX_DV */
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0 10 2 0 1 0 /* RX_ER */
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0 0 2 0 1 0 /* RX_CLK */
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2 9 1 0 3 0 /* GTX_CLK - CLK10 */
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2 8 2 0 1 0>; /* GTX125 - CLK9 */
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};
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