// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/display/media-bus-format.h>
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&dsi {
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status = "disabled";
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};
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&dsi_in_vopb {
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status = "disabled";
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};
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&i2c2 {
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clock-frequency = <400000>;
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status = "okay";
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sii9022: sii9022@39 {
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compatible = "sil,sii9022";
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reg = <0x39>;
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pinctrl-names = "default";
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pinctrl-0 = <&sii902x_rgb2hdmi>;
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interrupt-parent = <&gpio2>;
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interrupts = <RK_PC5 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
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enable-gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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sii9022_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_sii9022>;
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};
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};
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};
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};
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};
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/*
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* The pins of i2s1 and reset on sii902x are multiplexed
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*/
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&i2s1_2ch {
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status = "disabled";
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};
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&pinctrl {
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sii902x {
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sii902x_rgb2hdmi: sii902x-rgb2hdmi {
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rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&rgb {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcdc_m0_rgb_pins>;
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pinctrl-1 = <&lcdc_m0_sleep_pins>;
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ports {
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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rgb_out_sii9022: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sii9022_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vopb {
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status = "okay";
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};
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&route_dsi {
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status = "disabled";
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};
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&vopb {
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status = "okay";
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};
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&vopl {
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status = "disabled";
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};
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