MediaTek PMIC Wrapper Driver
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This document describes the binding for the MediaTek PMIC wrapper.
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On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
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is not directly visible to the CPU, but only through the PMIC wrapper
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inside the SoC. The communication between the SoC and the PMIC can
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optionally be encrypted. Also a non standard Dual IO SPI mode can be
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used to increase speed.
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IP Pairing
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on MT8135 the pins of some SoC internal peripherals can be on the PMIC.
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The signals of these pins are routed over the SPI bus using the pwrap
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bridge. In the binding description below the properties needed for bridging
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are marked with "IP Pairing". These are optional on SoCs which do not support
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IP Pairing
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Required properties in pwrap device node.
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- compatible:
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"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
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"mediatek,mt6797-pwrap" for MT6797 SoCs
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"mediatek,mt7622-pwrap" for MT7622 SoCs
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"mediatek,mt8135-pwrap" for MT8135 SoCs
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"mediatek,mt8173-pwrap" for MT8173 SoCs
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- interrupts: IRQ for pwrap in SOC
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- reg-names: Must include the following entries:
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"pwrap": Main registers base
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"pwrap-bridge": bridge base (IP Pairing)
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- reg: Must contain an entry for each entry in reg-names.
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- reset-names: Must include the following entries:
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"pwrap"
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"pwrap-bridge" (IP Pairing)
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- resets: Must contain an entry for each entry in reset-names.
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- clock-names: Must include the following entries:
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"spi": SPI bus clock
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"wrap": Main module clock
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- clocks: Must contain an entry for each entry in clock-names.
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Optional properities:
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- pmic: Using either MediaTek PMIC MFD as the child device of pwrap
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See the following for child node definitions:
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Documentation/devicetree/bindings/mfd/mt6397.txt
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or the regulator-only device as the child device of pwrap, such as MT6380.
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See the following definitions for such kinds of devices.
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Documentation/devicetree/bindings/regulator/mt6380-regulator.txt
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Example:
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pwrap: pwrap@1000f000 {
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compatible = "mediatek,mt8135-pwrap";
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reg = <0 0x1000f000 0 0x1000>,
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<0 0x11017000 0 0x1000>;
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reg-names = "pwrap", "pwrap-bridge";
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
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<&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
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reset-names = "pwrap", "pwrap-bridge";
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clocks = <&clk26m>, <&clk26m>;
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clock-names = "spi", "wrap";
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pmic {
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compatible = "mediatek,mt6397";
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};
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};
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