Imagination Pistachio SoC
|
=========================
|
|
Required properties:
|
--------------------
|
- compatible: Must include "img,pistachio".
|
|
CPU nodes:
|
----------
|
A "cpus" node is required. Required properties:
|
- #address-cells: Must be 1.
|
- #size-cells: Must be 0.
|
A CPU sub-node is also required for at least CPU 0. Since the topology may
|
be probed via CPS, it is not necessary to specify secondary CPUs. Required
|
propertis:
|
- device_type: Must be "cpu".
|
- compatible: Must be "mti,interaptiv".
|
- reg: CPU number.
|
- clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for
|
details on clock bindings.
|
Example:
|
cpus {
|
#address-cells = <1>;
|
#size-cells = <0>;
|
|
cpu0: cpu@0 {
|
device_type = "cpu";
|
compatible = "mti,interaptiv";
|
reg = <0>;
|
clocks = <&clk_core CLK_MIPS>;
|
};
|
};
|
|
|
Boot protocol:
|
--------------
|
In accordance with the MIPS UHI specification[1], the bootloader must pass the
|
following arguments to the kernel:
|
- $a0: -2.
|
- $a1: KSEG0 address of the flattened device-tree blob.
|
|
[1] http://prplfoundation.org/wiki/MIPS_documentation
|
