/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015-2017 Google, Inc
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*
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* USB Type-C Port Controller Interface.
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*/
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#ifndef __LINUX_USB_TCPCI_H
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#define __LINUX_USB_TCPCI_H
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#define TCPC_VENDOR_ID 0x0
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#define TCPC_PRODUCT_ID 0x2
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#define TCPC_BCD_DEV 0x4
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#define TCPC_TC_REV 0x6
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#define TCPC_PD_REV 0x8
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#define TCPC_PD_INT_REV 0xa
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#define TCPC_ALERT 0x10
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#define TCPC_ALERT_VBUS_DISCNCT BIT(11)
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#define TCPC_ALERT_RX_BUF_OVF BIT(10)
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#define TCPC_ALERT_FAULT BIT(9)
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#define TCPC_ALERT_V_ALARM_LO BIT(8)
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#define TCPC_ALERT_V_ALARM_HI BIT(7)
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#define TCPC_ALERT_TX_SUCCESS BIT(6)
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#define TCPC_ALERT_TX_DISCARDED BIT(5)
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#define TCPC_ALERT_TX_FAILED BIT(4)
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#define TCPC_ALERT_RX_HARD_RST BIT(3)
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#define TCPC_ALERT_RX_STATUS BIT(2)
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#define TCPC_ALERT_POWER_STATUS BIT(1)
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#define TCPC_ALERT_CC_STATUS BIT(0)
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#define TCPC_ALERT_MASK 0x12
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#define TCPC_POWER_STATUS_MASK 0x14
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#define TCPC_FAULT_STATUS_MASK 0x15
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#define TCPC_CONFIG_STD_OUTPUT 0x18
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#define TCPC_TCPC_CTRL 0x19
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#define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
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#define TCPC_ROLE_CTRL 0x1a
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#define TCPC_ROLE_CTRL_DRP BIT(6)
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#define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
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#define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
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#define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
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#define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
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#define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
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#define TCPC_ROLE_CTRL_CC2_SHIFT 2
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#define TCPC_ROLE_CTRL_CC2_MASK 0x3
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#define TCPC_ROLE_CTRL_CC1_SHIFT 0
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#define TCPC_ROLE_CTRL_CC1_MASK 0x3
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#define TCPC_ROLE_CTRL_CC_RA 0x0
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#define TCPC_ROLE_CTRL_CC_RP 0x1
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#define TCPC_ROLE_CTRL_CC_RD 0x2
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#define TCPC_ROLE_CTRL_CC_OPEN 0x3
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#define TCPC_FAULT_CTRL 0x1b
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#define TCPC_POWER_CTRL 0x1c
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#define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
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#define TCPC_CC_STATUS 0x1d
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#define TCPC_CC_STATUS_TOGGLING BIT(5)
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#define TCPC_CC_STATUS_TERM BIT(4)
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#define TCPC_CC_STATUS_CC2_SHIFT 2
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#define TCPC_CC_STATUS_CC2_MASK 0x3
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#define TCPC_CC_STATUS_CC1_SHIFT 0
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#define TCPC_CC_STATUS_CC1_MASK 0x3
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#define TCPC_POWER_STATUS 0x1e
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#define TCPC_POWER_STATUS_UNINIT BIT(6)
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#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
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#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
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#define TCPC_FAULT_STATUS 0x1f
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#define TCPC_COMMAND 0x23
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#define TCPC_CMD_WAKE_I2C 0x11
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#define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
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#define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
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#define TCPC_CMD_DISABLE_SINK_VBUS 0x44
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#define TCPC_CMD_SINK_VBUS 0x55
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#define TCPC_CMD_DISABLE_SRC_VBUS 0x66
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#define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
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#define TCPC_CMD_SRC_VBUS_HIGH 0x88
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#define TCPC_CMD_LOOK4CONNECTION 0x99
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#define TCPC_CMD_RXONEMORE 0xAA
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#define TCPC_CMD_I2C_IDLE 0xFF
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#define TCPC_DEV_CAP_1 0x24
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#define TCPC_DEV_CAP_2 0x26
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#define TCPC_STD_INPUT_CAP 0x28
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#define TCPC_STD_OUTPUT_CAP 0x29
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#define TCPC_MSG_HDR_INFO 0x2e
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#define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
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#define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
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#define TCPC_MSG_HDR_INFO_REV_SHIFT 1
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#define TCPC_MSG_HDR_INFO_REV_MASK 0x3
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#define TCPC_RX_DETECT 0x2f
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#define TCPC_RX_DETECT_HARD_RESET BIT(5)
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#define TCPC_RX_DETECT_SOP BIT(0)
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#define TCPC_RX_BYTE_CNT 0x30
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#define TCPC_RX_BUF_FRAME_TYPE 0x31
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#define TCPC_RX_HDR 0x32
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#define TCPC_RX_DATA 0x34 /* through 0x4f */
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#define TCPC_TRANSMIT 0x50
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#define TCPC_TRANSMIT_RETRY_SHIFT 4
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#define TCPC_TRANSMIT_RETRY_MASK 0x3
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#define TCPC_TRANSMIT_TYPE_SHIFT 0
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#define TCPC_TRANSMIT_TYPE_MASK 0x7
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#define TCPC_TX_BYTE_CNT 0x51
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#define TCPC_TX_HDR 0x52
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#define TCPC_TX_DATA 0x54 /* through 0x6f */
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#define TCPC_VBUS_VOLTAGE 0x70
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#define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
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#define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
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#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
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#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
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struct tcpci;
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struct tcpci_data {
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struct regmap *regmap;
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int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
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int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
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bool enable);
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int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
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enum typec_cc_status cc);
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};
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struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data);
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void tcpci_unregister_port(struct tcpci *tcpci);
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irqreturn_t tcpci_irq(struct tcpci *tcpci);
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#endif /* __LINUX_USB_TCPCI_H */
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