/******************************************************************************
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*
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* Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8712_CMDCTRL_BITDEF_H__
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#define __RTL8712_CMDCTRL_BITDEF_H__
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/*
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* 2. Command Control Registers (Offset: 0x0040 - 0x004F)
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*/
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/*--------------------------------------------------------------------------*/
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/* 8192S (CMD) command register bits (Offset 0x40, 16 bits)*/
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/*--------------------------------------------------------------------------*/
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#define _APSDOFF_STATUS BIT(15)
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#define _APSDOFF BIT(14)
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#define _BBRSTn BIT(13) /*Enable OFDM/CCK*/
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#define _BB_GLB_RSTn BIT(12) /*Enable BB*/
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#define _SCHEDULE_EN BIT(10) /*Enable MAC scheduler*/
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#define _MACRXEN BIT(9)
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#define _MACTXEN BIT(8)
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#define _DDMA_EN BIT(7) /*FW off load function enable*/
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#define _FW2HW_EN BIT(6) /*MAC every module reset */
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#define _RXDMA_EN BIT(5)
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#define _TXDMA_EN BIT(4)
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#define _HCI_RXDMA_EN BIT(3)
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#define _HCI_TXDMA_EN BIT(2)
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/*TXPAUSE*/
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#define _STOPHCCA BIT(6)
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#define _STOPHIGH BIT(5)
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#define _STOPMGT BIT(4)
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#define _STOPVO BIT(3)
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#define _STOPVI BIT(2)
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#define _STOPBE BIT(1)
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#define _STOPBK BIT(0)
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/*TCR*/
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#define _DISCW BIT(20)
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#define _ICV BIT(19)
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#define _CFEND_FMT BIT(17)
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#define _CRC BIT(16)
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#define _FWRDY BIT(7)
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#define _BASECHG BIT(6)
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#define _IMEM_RDY BIT(5)
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#define _DMEM_CODE_DONE BIT(4)
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#define _EMEM_CHK_RPT BIT(3)
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#define _EMEM_CODE_DONE BIT(2)
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#define _IMEM_CHK_RPT BIT(1)
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#define _IMEM_CODE_DONE BIT(0)
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#define _TXDMA_INIT_VALUE (_IMEM_CHK_RPT | _EMEM_CHK_RPT)
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/*RCR*/
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#define _ENMBID BIT(27)
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#define _APP_PHYST_RXFF BIT(25)
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#define _APP_PHYST_STAFF BIT(24)
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#define _CBSSID BIT(23)
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#define _APWRMGT BIT(22)
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#define _ADD3 BIT(21)
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#define _AMF BIT(20)
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#define _ACF BIT(19)
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#define _ADF BIT(18)
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#define _APP_MIC BIT(17)
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#define _APP_ICV BIT(16)
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#define _RXFTH_MSK 0x0000E000
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#define _RXFTH_SHT 13
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#define _AICV BIT(12)
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#define _RXPKTLMT_MSK 0x00000FC0
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#define _RXPKTLMT_SHT 6
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#define _ACRC32 BIT(5)
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#define _AB BIT(3)
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#define _AM BIT(2)
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#define _APM BIT(1)
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#define _AAP BIT(0)
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/*MSR*/
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#define _NETTYPE_MSK 0x03
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#define _NETTYPE_SHT 0
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/*BT*/
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#define _BTMODE_MSK 0x06
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#define _BTMODE_SHT 1
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#define _ENBT BIT(0)
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/*MBIDCTRL*/
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#define _ENMBID_MODE BIT(15)
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#define _BCNNO_MSK 0x7000
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#define _BCNNO_SHT 12
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#define _BCNSPACE_MSK 0x0FFF
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#define _BCNSPACE_SHT 0
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#endif /* __RTL8712_CMDCTRL_BITDEF_H__*/
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