/*
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* A common IOMMU based DMA-API implementation for ARM and ARM64 architecutes.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/dma-iommu.h>
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#include <linux/gfp.h>
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#include <linux/huge_mm.h>
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#include <linux/iommu.h>
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#include <linux/iova.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/vmalloc.h>
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#include <linux/platform_device.h>
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#include <linux/amba/bus.h>
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#include <asm/dma-mapping.h>
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static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp,
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struct dma_attrs *attrs)
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{
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bool coherent = is_device_dma_coherent(dev);
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int ioprot = dma_direction_to_prot(DMA_BIDIRECTIONAL, coherent);
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size_t iosize = size;
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void *addr;
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if (WARN(!dev, "cannot create IOMMU mapping for unknown device\n"))
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return NULL;
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size = PAGE_ALIGN(size);
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/*
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* Some drivers rely on this, and we probably don't want the
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* possibility of stale kernel data being read by devices anyway.
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*/
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gfp |= __GFP_ZERO;
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if (gfpflags_allow_blocking(gfp)) {
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struct page **pages;
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pgprot_t prot = arch_get_dma_pgprot(attrs, PAGE_KERNEL,
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coherent);
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pages = iommu_dma_alloc(dev, iosize, gfp, ioprot, handle,
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arch_flush_page);
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if (!pages)
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return NULL;
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addr = dma_common_pages_remap(pages, size, VM_USERMAP, prot,
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__builtin_return_address(0));
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if (!addr)
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iommu_dma_free(dev, pages, iosize, handle);
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} else {
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struct page *page;
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/*
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* In atomic context we can't remap anything, so we'll only
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* get the virtually contiguous buffer we need by way of a
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* physically contiguous allocation.
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*/
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if (coherent) {
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page = alloc_pages(gfp, get_order(size));
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addr = page ? page_address(page) : NULL;
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} else {
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addr = arch_alloc_from_atomic_pool(size, &page, gfp);
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}
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if (!addr)
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return NULL;
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*handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot);
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if (iommu_dma_mapping_error(dev, *handle)) {
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if (coherent)
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__free_pages(page, get_order(size));
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else
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arch_free_from_atomic_pool(addr, size);
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addr = NULL;
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}
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}
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return addr;
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}
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static void __iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, struct dma_attrs *attrs)
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{
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size_t iosize = size;
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size = PAGE_ALIGN(size);
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/*
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* @cpu_addr will be one of 3 things depending on how it was allocated:
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* - A remapped array of pages from iommu_dma_alloc(), for all
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* non-atomic allocations.
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* - A non-cacheable alias from the atomic pool, for atomic
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* allocations by non-coherent devices.
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* - A normal lowmem address, for atomic allocations by
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* coherent devices.
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* Hence how dodgy the below logic looks...
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*/
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if (arch_in_atomic_pool(cpu_addr, size)) {
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iommu_dma_unmap_page(dev, handle, iosize, 0, NULL);
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arch_free_from_atomic_pool(cpu_addr, size);
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} else if (is_vmalloc_addr(cpu_addr)){
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struct vm_struct *area = find_vm_area(cpu_addr);
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if (WARN_ON(!area || !area->pages))
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return;
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iommu_dma_free(dev, area->pages, iosize, &handle);
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dma_common_free_remap(cpu_addr, size, VM_USERMAP);
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} else {
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iommu_dma_unmap_page(dev, handle, iosize, 0, NULL);
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__free_pages(virt_to_page(cpu_addr), get_order(size));
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}
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}
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static int __iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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struct dma_attrs *attrs)
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{
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struct vm_struct *area;
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int ret;
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vma->vm_page_prot = arch_get_dma_pgprot(attrs, vma->vm_page_prot,
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is_device_dma_coherent(dev));
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if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
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return ret;
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area = find_vm_area(cpu_addr);
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if (WARN_ON(!area || !area->pages))
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return -ENXIO;
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return iommu_dma_mmap(area->pages, size, vma);
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}
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static int __iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size, struct dma_attrs *attrs)
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{
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unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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struct vm_struct *area = find_vm_area(cpu_addr);
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if (WARN_ON(!area || !area->pages))
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return -ENXIO;
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return sg_alloc_table_from_pages(sgt, area->pages, count, 0, size,
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GFP_KERNEL);
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}
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static void __iommu_sync_single_for_cpu(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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phys_addr_t phys;
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if (is_device_dma_coherent(dev))
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return;
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phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
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arch_dma_unmap_area(phys, size, dir);
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}
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static void __iommu_sync_single_for_device(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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phys_addr_t phys;
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if (is_device_dma_coherent(dev))
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return;
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phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
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arch_dma_map_area(phys, size, dir);
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}
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static dma_addr_t __iommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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bool coherent = is_device_dma_coherent(dev);
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int prot = dma_direction_to_prot(dir, coherent);
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dma_addr_t dev_addr = iommu_dma_map_page(dev, page, offset, size, prot);
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if (!iommu_dma_mapping_error(dev, dev_addr) &&
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!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__iommu_sync_single_for_device(dev, dev_addr, size, dir);
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return dev_addr;
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}
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static void __iommu_unmap_page(struct device *dev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__iommu_sync_single_for_cpu(dev, dev_addr, size, dir);
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iommu_dma_unmap_page(dev, dev_addr, size, dir, attrs);
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}
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static void __iommu_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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if (is_device_dma_coherent(dev))
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return;
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for_each_sg(sgl, sg, nelems, i)
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arch_dma_unmap_area(sg_phys(sg), sg->length, dir);
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}
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static void __iommu_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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if (is_device_dma_coherent(dev))
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return;
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for_each_sg(sgl, sg, nelems, i)
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arch_dma_map_area(sg_phys(sg), sg->length, dir);
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}
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static int __iommu_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
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int nelems, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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bool coherent = is_device_dma_coherent(dev);
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if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__iommu_sync_sg_for_device(dev, sgl, nelems, dir);
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return iommu_dma_map_sg(dev, sgl, nelems,
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dma_direction_to_prot(dir, coherent));
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}
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static void __iommu_unmap_sg_attrs(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__iommu_sync_sg_for_cpu(dev, sgl, nelems, dir);
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iommu_dma_unmap_sg(dev, sgl, nelems, dir, attrs);
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}
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static struct dma_map_ops iommu_dma_ops = {
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.alloc = __iommu_alloc_attrs,
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.free = __iommu_free_attrs,
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.mmap = __iommu_mmap_attrs,
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.get_sgtable = __iommu_get_sgtable,
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.map_page = __iommu_map_page,
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.unmap_page = __iommu_unmap_page,
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.map_sg = __iommu_map_sg_attrs,
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.unmap_sg = __iommu_unmap_sg_attrs,
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.sync_single_for_cpu = __iommu_sync_single_for_cpu,
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.sync_single_for_device = __iommu_sync_single_for_device,
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.sync_sg_for_cpu = __iommu_sync_sg_for_cpu,
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.sync_sg_for_device = __iommu_sync_sg_for_device,
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.dma_supported = iommu_dma_supported,
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.mapping_error = iommu_dma_mapping_error,
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};
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/*
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* TODO: Right now __iommu_setup_dma_ops() gets called too early to do
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* everything it needs to - the device is only partially created and the
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* IOMMU driver hasn't seen it yet, so it can't have a group. Thus we
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* need this delayed attachment dance. Once IOMMU probe ordering is sorted
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* to move the arch_setup_dma_ops() call later, all the notifier bits below
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* become unnecessary, and will go away.
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*/
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struct iommu_dma_notifier_data {
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struct list_head list;
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struct device *dev;
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const struct iommu_ops *ops;
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u64 dma_base;
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u64 size;
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};
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static LIST_HEAD(iommu_dma_masters);
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static DEFINE_MUTEX(iommu_dma_notifier_lock);
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/*
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* Temporarily "borrow" a domain feature flag to to tell if we had to resort
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* to creating our own domain here, in case we need to clean it up again.
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*/
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#define __IOMMU_DOMAIN_FAKE_DEFAULT (1U << 31)
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static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
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u64 dma_base, u64 size)
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{
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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/*
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* Best case: The device is either part of a group which was
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* already attached to a domain in a previous call, or it's
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* been put in a default DMA domain by the IOMMU core.
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*/
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if (!domain) {
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/*
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* Urgh. The IOMMU core isn't going to do default domains
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* for non-PCI devices anyway, until it has some means of
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* abstracting the entirely implementation-specific
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* sideband data/SoC topology/unicorn dust that may or
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* may not differentiate upstream masters.
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* So until then, HORRIBLE HACKS!
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*/
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domain = ops->domain_alloc(IOMMU_DOMAIN_DMA);
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if (!domain)
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goto out_no_domain;
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domain->ops = ops;
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domain->type = IOMMU_DOMAIN_DMA | __IOMMU_DOMAIN_FAKE_DEFAULT;
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if (iommu_attach_device(domain, dev))
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goto out_put_domain;
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}
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if (iommu_dma_init_domain(domain, dma_base, size))
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goto out_detach;
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arch_set_dma_ops(dev, &iommu_dma_ops);
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return true;
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out_detach:
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iommu_detach_device(domain, dev);
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out_put_domain:
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if (domain->type & __IOMMU_DOMAIN_FAKE_DEFAULT)
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iommu_domain_free(domain);
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out_no_domain:
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pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
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dev_name(dev));
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return false;
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}
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static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops,
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u64 dma_base, u64 size)
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{
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struct iommu_dma_notifier_data *iommudata;
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iommudata = kzalloc(sizeof(*iommudata), GFP_KERNEL);
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if (!iommudata)
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return;
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iommudata->dev = dev;
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iommudata->ops = ops;
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iommudata->dma_base = dma_base;
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iommudata->size = size;
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mutex_lock(&iommu_dma_notifier_lock);
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list_add(&iommudata->list, &iommu_dma_masters);
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mutex_unlock(&iommu_dma_notifier_lock);
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}
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static int __iommu_attach_notifier(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct iommu_dma_notifier_data *master, *tmp;
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if (action != BUS_NOTIFY_ADD_DEVICE)
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return 0;
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mutex_lock(&iommu_dma_notifier_lock);
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list_for_each_entry_safe(master, tmp, &iommu_dma_masters, list) {
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if (do_iommu_attach(master->dev, master->ops,
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master->dma_base, master->size)) {
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list_del(&master->list);
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kfree(master);
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}
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}
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mutex_unlock(&iommu_dma_notifier_lock);
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return 0;
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}
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static int __init register_iommu_dma_ops_notifier(struct bus_type *bus)
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{
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struct notifier_block *nb = kzalloc(sizeof(*nb), GFP_KERNEL);
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int ret;
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if (!nb)
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return -ENOMEM;
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/*
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* The device must be attached to a domain before the driver probe
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* routine gets a chance to start allocating DMA buffers. However,
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* the IOMMU driver also needs a chance to configure the iommu_group
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* via its add_device callback first, so we need to make the attach
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* happen between those two points. Since the IOMMU core uses a bus
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* notifier with default priority for add_device, do the same but
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* with a lower priority to ensure the appropriate ordering.
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*/
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nb->notifier_call = __iommu_attach_notifier;
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nb->priority = -100;
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ret = bus_register_notifier(bus, nb);
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if (ret) {
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pr_warn("Failed to register DMA domain notifier; IOMMU DMA ops unavailable on bus '%s'\n",
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bus->name);
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kfree(nb);
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}
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return ret;
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}
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static int __init __iommu_dma_init(void)
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{
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int ret;
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ret = iommu_dma_init();
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if (!ret)
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ret = register_iommu_dma_ops_notifier(&platform_bus_type);
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if (!ret)
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ret = register_iommu_dma_ops_notifier(&amba_bustype);
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/* handle devices queued before this arch_initcall */
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if (!ret)
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__iommu_attach_notifier(NULL, BUS_NOTIFY_ADD_DEVICE, NULL);
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return ret;
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}
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arch_initcall(__iommu_dma_init);
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bool common_iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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const struct iommu_ops *ops)
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{
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struct iommu_group *group;
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if (!ops)
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return false;
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/*
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* TODO: As a concession to the future, we're ready to handle being
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* called both early and late (i.e. after bus_add_device). Once all
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* the platform bus code is reworked to call us late and the notifier
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* junk above goes away, move the body of do_iommu_attach here.
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*/
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group = iommu_group_get(dev);
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if (group) {
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do_iommu_attach(dev, ops, dma_base, size);
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iommu_group_put(group);
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} else {
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queue_iommu_attach(dev, ops, dma_base, size);
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}
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return true;
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}
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EXPORT_SYMBOL_GPL(common_iommu_setup_dma_ops);
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void common_iommu_teardown_dma_ops(struct device *dev)
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{
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struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
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if (domain) {
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iommu_detach_device(domain, dev);
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if (domain->type & __IOMMU_DOMAIN_FAKE_DEFAULT)
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iommu_domain_free(domain);
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}
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arch_set_dma_ops(dev, NULL);
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}
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EXPORT_SYMBOL_GPL(common_iommu_teardown_dma_ops);
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