/*
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* Copyright (C) 2016 Chris Zhong <zyw@rock-chips.com>
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* Copyright (C) 2016 ROCKCHIP, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CDN_DP_CORE_H
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#define _CDN_DP_CORE_H
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_panel.h>
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#include "rockchip_drm_drv.h"
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#define MAX_PHY 2
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enum audio_format {
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AFMT_I2S = 0,
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AFMT_SPDIF = 1,
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AFMT_UNUSED,
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};
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struct audio_info {
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enum audio_format format;
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int sample_rate;
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int channels;
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int sample_width;
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};
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enum vic_pxl_encoding_format {
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PXL_RGB = 0x1,
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YCBCR_4_4_4 = 0x2,
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YCBCR_4_2_2 = 0x4,
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YCBCR_4_2_0 = 0x8,
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Y_ONLY = 0x10,
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};
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struct video_info {
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bool h_sync_polarity;
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bool v_sync_polarity;
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bool interlaced;
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int color_depth;
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enum vic_pxl_encoding_format color_fmt;
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};
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struct cdn_firmware_header {
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u32 size_bytes; /* size of the entire header+image(s) in bytes */
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u32 header_size; /* size of just the header in bytes */
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u32 iram_size; /* size of iram */
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u32 dram_size; /* size of dram */
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};
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struct cdn_dp_port {
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struct cdn_dp_device *dp;
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struct notifier_block event_nb;
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struct extcon_dev *extcon;
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struct phy *phy;
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u8 lanes;
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bool phy_enabled;
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u8 id;
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};
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struct cdn_dp_device {
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struct device *dev;
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struct drm_device *drm_dev;
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struct drm_connector connector;
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struct drm_encoder encoder;
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struct drm_display_mode mode;
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struct platform_device *audio_pdev;
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struct work_struct event_work;
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struct edid *edid;
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struct drm_dp_aux aux;
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struct mutex lock;
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bool connected;
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bool active;
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bool suspended;
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bool use_fw_training;
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u8 id;
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const struct firmware *fw; /* cdn dp firmware */
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unsigned int fw_version; /* cdn fw version */
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bool fw_loaded;
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void __iomem *regs;
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struct regmap *grf;
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struct clk *core_clk;
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struct clk *pclk;
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struct clk *spdif_clk;
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struct clk *grf_clk;
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struct reset_control *spdif_rst;
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struct reset_control *dptx_rst;
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struct reset_control *apb_rst;
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struct reset_control *core_rst;
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struct audio_info audio_info;
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struct video_info video_info;
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struct drm_dp_link link;
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struct cdn_dp_port *port[MAX_PHY];
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u8 ports;
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u8 lanes;
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int active_port;
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u8 train_set[4];
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u8 dpcd[DP_RECEIVER_CAP_SIZE];
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bool sink_has_audio;
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};
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#endif /* _CDN_DP_CORE_H */
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