/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include "dm_services.h"
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/*
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* Pre-requisites: headers required by header of this unit
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*/
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#include "include/i2caux_interface.h"
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#include "engine.h"
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#include "i2c_engine.h"
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/*
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* Header of this unit
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*/
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#include "i2c_hw_engine.h"
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/*
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* Post-requisites: headers required by this unit
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*/
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/*
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* This unit
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*/
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/*
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* @brief
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* Cast 'struct i2c_engine *'
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* to 'struct i2c_hw_engine *'
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*/
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#define FROM_I2C_ENGINE(ptr) \
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container_of((ptr), struct i2c_hw_engine, base)
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/*
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* @brief
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* Cast 'struct engine *'
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* to 'struct i2c_hw_engine *'
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*/
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#define FROM_ENGINE(ptr) \
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FROM_I2C_ENGINE(container_of((ptr), struct i2c_engine, base))
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enum i2caux_engine_type dal_i2c_hw_engine_get_engine_type(
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const struct engine *engine)
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{
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return I2CAUX_ENGINE_TYPE_I2C_DDC_HW;
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}
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bool dal_i2c_hw_engine_submit_request(
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struct engine *engine,
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struct i2caux_transaction_request *i2caux_request,
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bool middle_of_transaction)
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{
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struct i2c_hw_engine *hw_engine = FROM_ENGINE(engine);
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struct i2c_request_transaction_data request;
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uint32_t transaction_timeout;
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enum i2c_channel_operation_result operation_result;
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bool result = false;
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/* We need following:
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* transaction length will not exceed
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* the number of free bytes in HW buffer (minus one for address)*/
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if (i2caux_request->payload.length >=
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hw_engine->funcs->get_hw_buffer_available_size(hw_engine)) {
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW;
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return false;
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}
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if (i2caux_request->operation == I2CAUX_TRANSACTION_READ)
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request.action = middle_of_transaction ?
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I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT :
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I2CAUX_TRANSACTION_ACTION_I2C_READ;
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else if (i2caux_request->operation == I2CAUX_TRANSACTION_WRITE)
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request.action = middle_of_transaction ?
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I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT :
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I2CAUX_TRANSACTION_ACTION_I2C_WRITE;
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else {
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION;
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/* [anaumov] in DAL2, there was no "return false" */
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return false;
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}
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request.address = (uint8_t)i2caux_request->payload.address;
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request.length = i2caux_request->payload.length;
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request.data = i2caux_request->payload.data;
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/* obtain timeout value before submitting request */
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transaction_timeout = hw_engine->funcs->get_transaction_timeout(
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hw_engine, i2caux_request->payload.length + 1);
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hw_engine->base.funcs->submit_channel_request(
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&hw_engine->base, &request);
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if ((request.status == I2C_CHANNEL_OPERATION_FAILED) ||
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(request.status == I2C_CHANNEL_OPERATION_ENGINE_BUSY)) {
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY;
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return false;
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}
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/* wait until transaction proceed */
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operation_result = hw_engine->funcs->wait_on_operation_result(
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hw_engine,
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transaction_timeout,
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I2C_CHANNEL_OPERATION_ENGINE_BUSY);
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/* update transaction status */
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switch (operation_result) {
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case I2C_CHANNEL_OPERATION_SUCCEEDED:
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_SUCCEEDED;
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result = true;
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break;
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case I2C_CHANNEL_OPERATION_NO_RESPONSE:
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_NACK;
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break;
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case I2C_CHANNEL_OPERATION_TIMEOUT:
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT;
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break;
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case I2C_CHANNEL_OPERATION_FAILED:
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE;
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break;
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default:
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i2caux_request->status =
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I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION;
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}
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if (result && (i2caux_request->operation == I2CAUX_TRANSACTION_READ)) {
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struct i2c_reply_transaction_data reply;
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reply.data = i2caux_request->payload.data;
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reply.length = i2caux_request->payload.length;
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hw_engine->base.funcs->
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process_channel_reply(&hw_engine->base, &reply);
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}
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return result;
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}
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bool dal_i2c_hw_engine_acquire_engine(
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struct i2c_engine *engine,
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struct ddc *ddc)
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{
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enum gpio_result result;
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uint32_t current_speed;
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result = dal_ddc_open(ddc, GPIO_MODE_HARDWARE,
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GPIO_DDC_CONFIG_TYPE_MODE_I2C);
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if (result != GPIO_RESULT_OK)
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return false;
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engine->base.ddc = ddc;
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current_speed = engine->funcs->get_speed(engine);
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if (current_speed)
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FROM_I2C_ENGINE(engine)->original_speed = current_speed;
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return true;
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}
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/*
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* @brief
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* Queries in a loop for current engine status
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* until retrieved status matches 'expected_result', or timeout occurs.
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* Timeout given in microseconds
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* and the status query frequency is also one per microsecond.
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*/
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enum i2c_channel_operation_result dal_i2c_hw_engine_wait_on_operation_result(
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struct i2c_hw_engine *engine,
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uint32_t timeout,
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enum i2c_channel_operation_result expected_result)
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{
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enum i2c_channel_operation_result result;
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uint32_t i = 0;
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if (!timeout)
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return I2C_CHANNEL_OPERATION_SUCCEEDED;
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do {
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result = engine->base.funcs->get_channel_status(
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&engine->base, NULL);
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if (result != expected_result)
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break;
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udelay(1);
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++i;
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} while (i < timeout);
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return result;
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}
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void dal_i2c_hw_engine_construct(
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struct i2c_hw_engine *engine,
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struct dc_context *ctx)
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{
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dal_i2c_engine_construct(&engine->base, ctx);
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engine->original_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
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engine->default_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
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}
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void dal_i2c_hw_engine_destruct(
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struct i2c_hw_engine *engine)
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{
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dal_i2c_engine_destruct(&engine->base);
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}
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