// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
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#include "cc_driver.h"
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#include "cc_sram_mgr.h"
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/**
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* struct cc_sram_ctx -Internal RAM context manager
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* @sram_free_offset: the offset to the non-allocated area
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*/
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struct cc_sram_ctx {
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cc_sram_addr_t sram_free_offset;
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};
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/**
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* cc_sram_mgr_fini() - Cleanup SRAM pool.
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*
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* @drvdata: Associated device driver context
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*/
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void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
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{
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/* Free "this" context */
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kfree(drvdata->sram_mgr_handle);
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}
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/**
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* cc_sram_mgr_init() - Initializes SRAM pool.
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* The pool starts right at the beginning of SRAM.
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* Returns zero for success, negative value otherwise.
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*
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* @drvdata: Associated device driver context
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*/
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int cc_sram_mgr_init(struct cc_drvdata *drvdata)
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{
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struct cc_sram_ctx *ctx;
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dma_addr_t start = 0;
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struct device *dev = drvdata_to_dev(drvdata);
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if (drvdata->hw_rev < CC_HW_REV_712) {
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/* Pool starts after ROM bytes */
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start = (dma_addr_t)cc_ioread(drvdata,
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CC_REG(HOST_SEP_SRAM_THRESHOLD));
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if ((start & 0x3) != 0) {
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dev_err(dev, "Invalid SRAM offset %pad\n", &start);
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return -EINVAL;
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}
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}
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/* Allocate "this" context */
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ctx->sram_free_offset = start;
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drvdata->sram_mgr_handle = ctx;
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return 0;
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}
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/*!
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* Allocated buffer from SRAM pool.
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* Note: Caller is responsible to free the LAST allocated buffer.
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* This function does not taking care of any fragmentation may occur
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* by the order of calls to alloc/free.
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*
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* \param drvdata
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* \param size The requested bytes to allocate
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*/
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cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
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{
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struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
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struct device *dev = drvdata_to_dev(drvdata);
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cc_sram_addr_t p;
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if ((size & 0x3)) {
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dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
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size);
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return NULL_SRAM_ADDR;
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}
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if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
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dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
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size, smgr_ctx->sram_free_offset);
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return NULL_SRAM_ADDR;
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}
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p = smgr_ctx->sram_free_offset;
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smgr_ctx->sram_free_offset += size;
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dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
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return p;
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}
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/**
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* cc_set_sram_desc() - Create const descriptors sequence to
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* set values in given array into SRAM.
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* Note: each const value can't exceed word size.
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*
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* @src: A pointer to array of words to set as consts.
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* @dst: The target SRAM buffer to set into
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* @nelements: The number of words in "src" array
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* @seq: A pointer to the given IN/OUT descriptor sequence
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* @seq_len: A pointer to the given IN/OUT sequence length
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*/
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void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst,
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unsigned int nelement, struct cc_hw_desc *seq,
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unsigned int *seq_len)
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{
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u32 i;
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unsigned int idx = *seq_len;
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for (i = 0; i < nelement; i++, idx++) {
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hw_desc_init(&seq[idx]);
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set_din_const(&seq[idx], src[i], sizeof(u32));
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set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
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set_flow_mode(&seq[idx], BYPASS);
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}
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*seq_len = idx;
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}
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