/*
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* Pinmux configuration for CompuLab CL-SOM-AM57x board
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*
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* (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
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*
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* Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mux_dra7xx.h>
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/* Serial console */
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static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
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{UART3_RXD, (FSC | IEN | PDIS | PTU | M0)}, /* UART3_RXD */
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{UART3_TXD, (FSC | IEN | PDIS | PTU | M0)}, /* UART3_TXD */
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};
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/* PMIC I2C */
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static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
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{MCASP1_ACLKR, (IEN | PEN | M10)}, /* MCASP1_ACLKR.I2C4_SDA */
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{MCASP1_FSR, (IEN | PEN | M10)}, /* MCASP1_FSR.I2C4_SCL */
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};
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/* Green GPIO led */
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static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
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{GPMC_A15, (IDIS | PDIS | PTD | M14)}, /* GPMC_A15.GPIO2_5 */
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};
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/* MMC/SD Card */
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static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
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{MMC1_CLK, (IEN | PDIS | PTU | M0) }, /* MMC1_CLK */
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{MMC1_CMD, (IEN | PDIS | PTU | M0) }, /* MMC1_CMD */
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{MMC1_DAT0, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT0 */
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{MMC1_DAT1, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT1 */
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{MMC1_DAT2, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT2 */
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{MMC1_DAT3, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT3 */
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{MMC1_SDCD, (IEN | PEN | M14)}, /* MMC1_SDCD */
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{MMC1_SDWP, (IEN | PEN | M14)}, /* MMC1_SDWP */
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};
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/* WiFi - must be in the safe mode on boot */
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static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
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{UART1_CTSN, (IEN | M15)}, /* UART1_CTSN */
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{UART1_RTSN, (IEN | M15)}, /* UART1_RTSN */
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{UART2_RXD, (IEN | M15)}, /* UART2_RXD */
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{UART2_TXD, (IEN | M15)}, /* UART2_TXD */
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{UART2_CTSN, (IEN | M15)}, /* UART2_CTSN */
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{UART2_RTSN, (IEN | M15)}, /* UART2_RTSN */
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};
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/* QSPI */
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static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
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{GPMC_A13, (IEN | PEN | M1)}, /* GPMC_A13.QSPI1_RTCLK */
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{GPMC_A18, (IEN | PEN | M1)}, /* GPMC_A18.QSPI1_SCLK */
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{GPMC_A16, (IEN | PEN | M1)}, /* GPMC_A16.QSPI1_D0 */
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{GPMC_A17, (IEN | PEN | M1)}, /* GPMC_A17.QSPI1_D1 */
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{GPMC_CS2, (IEN | PDIS | PTU | M1)}, /* GPMC_CS2.QSPI1_CS0 */
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};
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/* GPIO Expander I2C */
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static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
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{MCASP1_AXR0, (IEN | PEN | M10)}, /* MCASP1_AXR0.I2C5_SDA */
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{MCASP1_AXR1, (IEN | PEN | M10)}, /* MCASP1_AXR1.I2C5_SCL */
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};
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/* eMMC internal storage */
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static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
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{GPMC_A19, (IEN | PDIS | PTU | M1)}, /* GPMC_A19.MMC2_DAT4 */
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{GPMC_A20, (IEN | PDIS | PTU | M1)}, /* GPMC_A20.MMC2_DAT5 */
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{GPMC_A21, (IEN | PDIS | PTU | M1)}, /* GPMC_A21.MMC2_DAT6 */
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{GPMC_A22, (IEN | PDIS | PTU | M1)}, /* GPMC_A22.MMC2_DAT7 */
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{GPMC_A23, (IEN | PDIS | PTU | M1)}, /* GPMC_A23.MMC2_CLK */
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{GPMC_A24, (IEN | PDIS | PTU | M1)}, /* GPMC_A24.MMC2_DAT0 */
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{GPMC_A25, (IEN | PDIS | PTU | M1)}, /* GPMC_A25.MMC2_DAT1 */
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{GPMC_A26, (IEN | PDIS | PTU | M1)}, /* GPMC_A26.MMC2_DAT2 */
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{GPMC_A27, (IEN | PDIS | PTU | M1)}, /* GPMC_A27.MMC2_DAT3 */
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{GPMC_CS1, (IEN | PDIS | PTU | M1)}, /* GPMC_CS1.MMC2_CMD */
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};
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/* usb1_drvvbus */
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static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
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{USB1_DRVVBUS, (M0 | FSC) }, /* USB1_DRVVBUS.USB1_DRVVBUS */
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};
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/* Ethernet */
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static const struct pad_conf_entry cl_som_am57x_padconf_ethernet[] = {
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/* MDIO bus */
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{VIN2A_D10, (PDIS | PTU | M3) }, /* VIN2A_D10.MDIO_MCLK */
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{VIN2A_D11, (IEN | PDIS | PTU | M3) }, /* VIN2A_D11.MDIO_D */
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/* EMAC Slave 1 at addr 0x1 - Default interface */
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{VIN2A_D12, (IDIS | PEN | M3) }, /* VIN2A_D12.RGMII1_TXC */
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{VIN2A_D13, (IDIS | PEN | M3) }, /* VIN2A_D13.RGMII1_TXCTL */
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{VIN2A_D14, (IDIS | PEN | M3) }, /* VIN2A_D14.RGMII1_TXD3 */
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{VIN2A_D15, (IDIS | PEN | M3) }, /* VIN2A_D15.RGMII1_TXD2 */
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{VIN2A_D16, (IDIS | PEN | M3) }, /* VIN2A_D16.RGMII1_TXD1 */
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{VIN2A_D17, (IDIS | PEN | M3) }, /* VIN2A_D17.RGMII1_TXD0 */
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{VIN2A_D18, (IEN | PDIS | PTD | M3) }, /* VIN2A_D18.RGMII1_RXC */
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{VIN2A_D19, (IEN | PDIS | PTD | M3) }, /* VIN2A_D19.RGMII1_RXCTL */
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{VIN2A_D20, (IEN | PDIS | PTD | M3) }, /* VIN2A_D20.RGMII1_RXD3 */
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{VIN2A_D21, (IEN | PDIS | PTD | M3) }, /* VIN2A_D21.RGMII1_RXD2 */
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{VIN2A_D22, (IEN | PDIS | PTD | M3) }, /* VIN2A_D22.RGMII1_RXD1 */
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{VIN2A_D23, (IEN | PDIS | PTD | M3) }, /* VIN2A_D23.RGMII1_RXD0 */
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/* Eth PHY1 reset GPIOs*/
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{VIN2A_CLK0, (IDIS | PDIS | PTD | M14)}, /* VIN2A_CLK0.GPIO3_28 */
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};
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#define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
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mux_array, ARRAY_SIZE(mux_array))
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void set_muxconf_regs(void)
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{
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SET_MUX(cl_som_am57x_padconf_console);
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SET_MUX(cl_som_am57x_padconf_pmic);
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SET_MUX(cl_som_am57x_padconf_green_led);
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SET_MUX(cl_som_am57x_padconf_sd_card);
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SET_MUX(cl_som_am57x_padconf_wifi);
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SET_MUX(cl_som_am57x_padconf_qspi);
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SET_MUX(cl_som_am57x_padconf_i2c_gpio);
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SET_MUX(cl_som_am57x_padconf_emmc);
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SET_MUX(cl_som_am57x_padconf_usb);
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SET_MUX(cl_som_am57x_padconf_ethernet);
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}
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